The NB3N510x series from ON Semiconductor is a family of precision, low-phase noise clock generators that supports PCI Express and sRIO clock requirements. These devices accept a 25 MHz fundamental mode parallel resonant crystal or a 25 MHz single-ended reference clock signal and generate differential HCSL/LVDS outputs. Clock outputs can be individually enabled/disabled through hardware input pins. In addition, these devices provide selectable spread options for applications demanding low-electromagnetic interference (EMI) as well as optimum performance with no spread option.
NB3N510xx Family of Devices Features
NB3N51032: Clock generator, 3.3 V, crystal to 25 MHz, 100 MHz, 125 MHz, and 200 MHz dual HCSL/LVDS
- Precision, low-phase noise clock generator that supports PCI express and Ethernet requirements
- Accepts a 25 MHz fundamental-mode parallel resonant crystal and generates a differential HCSL output at 25 MHz, 100 MHz, 125 MHz, or 200 MHz clock frequencies
- Outputs can interface with LVDS with proper termination
- Selectable spread options of 0.5% and - 0.75% for applications demanding low-electromagnetic interference (EMI) - no spread setting is also available.
NB3N51034: Quad HCSL/LVDS clock generator, 3.3 V, crystal to 100 MHz/200 MHz
- Takes a 25 MHz fundamental-mode parallel resonant crystal and generates four differential HCSL/LVDS outputs at 100 MHz or 200 MHz
- Provides selectable spread options of 0.5%, −1.0%, −1.5%, for applications demanding low-electromagnetic interference (EMI) - no spread setting is also available.
NB3N51054: 3.3 V, clock generator with crystal/external input to quad 100 MHz HCSL/LVDS outputs
- I2C interface to control spread spectrum and to enable/disable outputs
- 0.5 ps typical RMS phase jitter at 100 MHz (integration range: 12 KHz to 20 MHz)
- 20 ps typical cycle-cycle jitter at 100 MHz
NB3N51044: 3.3 V, clock generator with crystal/external input to quad 100 MHz or 125 MHz HCSL/LVDS outputs
- Individual output enable pin for each output
- 0.2 ps typical RMS phase jitter at 100 MHz/125 MHz (integration range: 1.875 MHz to 20 MHz)
- 320 ps typical cycle-cycle jitter at 100 MHz/125 MHz
Applications |
- Networking
- Consumer
- Computing and peripherals
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- Industrial equipment
- PCIe clock generation I, II, and III
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