Texas Instruments' TMS320C6748, fixed- and floating-point DSP is a low-power application processor based on a C674x DSP core. This DSP provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.

The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.

The device's DSP core uses a two-level cache-based architecture. The level one program cache (L1P) is a 32 KB, direct mapped cache, and the level one data cache (L1D) is a 32 KB, two-way, set-associative cache. The level two program cache (L2P) consists of a 256 KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by other hosts in the system, an additional 128 KB of RAM shared memory is available for use by other hosts without affecting DSP performance.