Texas Instruments' LMK03318 is an ultra-low-noise PLLatinum™ clock generator with one fractional-N frequency synthesizer with integrated VCO, flexible clock distribution/fanout, and pin-selectable configuration states stored in on-chip EEPROM. The device can generate multiple clocks for various multi-gigabit serial interfaces and digital devices, thus reducing BOM cost and board area and improving reliability by replacing multiple oscillators and clock distribution devices. The ultra-low-jitter reduces bit-error rate (BER) in high-speed serial links.
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- Ultra-low-noise, high performance
- Jitter: 100 fs RMS typical, FOUT > 100 MHz
- PSNR: -80 dBc, robust supply noise immunity
- Flexible device options
- Up to eight AC-LVPECL, AC-LVDS, AC-CML, HCSL, or LVCMOS outputs or any combination
- Pin mode, I2C mode, EEPROM mode
- Dual inputs with automatic or manual selection
- Crystal input: 10 MHz to 52 MHz
- External input: 1 MHz to 300 MHz
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- Frequency margining options
- Fine frequency margining using low-cost pullable crystal reference
- Glitchless coarse frequency margining (%) using output dividers
- Other features
- Supply: 3.3 V core; 1.8 V, 2.5 V, or 3.3 V output supply
- Industrial temperature range (-40°C to 85°C)
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