By Microsemi SoC 56
Microsemi's SmartFusion family of SoCs builds on the technology first introduced with Fusion mixed-signal FPGAs. SmartFusion SoCs are made possible by integrating FPGA technology with programmable high-performance analog and hardened Arm® Cortex®-M3 microcontroller blocks on a Flash semiconductor process. The SmartFusion SoC takes its name from the fact that these three discrete technologies are integrated on a single chip, enabling low-cost ownership and small footprint solutions.
The MSS is composed of a 100 MHz Cortex-M3 processor and integrated peripherals, which are interconnected via a multi-layer AHB bus matrix (ABM). This matrix allows the Cortex-M3 processor, FPGA fabric master, Ethernet media access controller (MAC), when available, and peripheral DMA (PDMA) controller to act as masters to the integrated peripherals, FPGA fabric, embedded non-volatile memory (eNVM), embedded synchronous RAM (eSRAM), external memory controller (EMC), and analog compute engine (ACE) blocks. SmartFusion cSoCs of different densities offer various sets of integrated peripherals. Available peripherals include SPI, I2C, and UART serial ports, embedded FlashROM (EFROM), 10/100 Ethernet MAC, timers, phase-locked loops (PLLs), oscillators, real-time counters (RTC), and peripheral DMA controller (PDMA).