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74ALVCH162836DLRG4

74ALVCH162836DLRG4
Mfr. #:
74ALVCH162836DLRG4
Description:
Universal Bus Functions 20-Bit Univ Bus Drv With 3-State Outputs
Lifecycle:
New from this manufacturer.
Datasheet:
74ALVCH162836DLRG4 Datasheet
Delivery:
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ECAD Model:
More Information:
74ALVCH162836DLRG4 more Information 74ALVCH162836DLRG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Universal Bus Functions
RoHS:
Y
Logic Family:
74AL
Number of Circuits:
1
Propagation Delay Time:
5.5 ns
Supply Voltage - Max:
3.6 V
Supply Voltage - Min:
1.65 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
SSOP-56
Packaging:
Reel
Function:
Universal Bus Driver
Height:
2.59 mm
Length:
18.41 mm
Output Type:
3-State
Width:
7.49 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Supply Current - Max:
40 uA
High Level Output Current:
- 12 mA
Low Level Output Current:
12 mA
Operating Supply Voltage:
1.65 V to 3.6 V
Polarity:
Non-Inverting
Product Type:
Universal Bus Functions
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.021164 oz
Tags
74ALVCH162836, 74ALVCH16283, 74ALVCH1628, 74ALVCH162, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS DVR 20BIT 56SSOP
***as Instruments
This 20-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when the latch-enable (LE\) input is low. When LE\ is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162836 is characterized for operation from –40C to 85C.
Part # Description Stock Price
74ALVCH162836DLRG4
DISTI # 74ALVCH162836DLRG4-ND		IC UNIV BUS DVR 20BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)		Limited Supply - Call
    74ALVCH162836DLRG4
    DISTI # 595-74ALVCH162836DLR    		Universal Bus Functions 20-Bit Univ Bus Drv With 3-State Outputs
    RoHS: Compliant    		0
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      Availability
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      Available
      On Order:
      4500
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