CY74FCT821BTSOC

CY74FCT821BTSOC
Mfr. #:
CY74FCT821BTSOC
Description:
Flip Flops 10-Bit Bus Interface Flip-Flops
Lifecycle:
New from this manufacturer.
Datasheet:
CY74FCT821BTSOC Datasheet
Delivery:
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ECAD Model:
More Information:
CY74FCT821BTSOC more Information CY74FCT821BTSOC Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Flip Flops
RoHS:
Y
Number of Circuits:
1
Logic Family:
FCT
Logic Type:
D-Type Flip-Flop
Polarity:
Non-Inverting
Input Type:
Single-Ended
Output Type:
3-State
Propagation Delay Time:
15 ns
High Level Output Current:
- 32 mA
Low Level Output Current:
64 mA
Supply Voltage - Min:
4.75 V
Supply Voltage - Max:
5.25 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Mounting Style:
SMD/SMT
Package / Case:
SOIC-24
Packaging:
Tube
Function:
D-Type Bus Interface
Height:
2.35 mm
Length:
15.4 mm
Operating Temperature Range:
- 40 C to + 85 C
Series:
CY74FCT821T
Width:
7.52 mm
Brand:
Texas Instruments
Number of Channels:
10
Number of Input Lines:
10
Number of Output Lines:
10
Operating Supply Voltage:
5 V
Product Type:
Flip Flops
Factory Pack Quantity:
25
Subcategory:
Logic ICs
Unit Weight:
0.022025 oz
Tags
CY74FCT821BTS, CY74FCT821B, CY74FCT821, CY74FCT82, CY74FCT8, CY74FCT, CY74FC, CY74F, CY74, CY7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ponent Stockers
FCT SERIES 10-BIT DRIVER TRUE OUTPUT PDSO24
***i-Key Marketplace
CY74FCT821T 10-BIT BUS INTERFACE
***AS INSTRUMENTS INC
This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a 10-bit-wide buffered version of the popular CY74FCT374 function. This device is ideal for use as an output port requiring high IOL/IOH.
***AS INSTUMENTS
This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
***ASI
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Availability
Stock:
290
On Order:
2273
Enter Quantity:
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