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SN74ACT533DWRE4

SN74ACT533DWRE4
Mfr. #:
SN74ACT533DWRE4
Description:
Latches Octal Transp D-Type
Lifecycle:
New from this manufacturer.
Datasheet:
SN74ACT533DWRE4 Datasheet
Delivery:
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Payment:
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ECAD Model:
More Information:
SN74ACT533DWRE4 more Information SN74ACT533DWRE4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Latches
RoHS:
Y
Number of Circuits:
8 Circuit
Logic Type:
D-Type Transparent Latch
Logic Family:
ACT
Polarity:
Inverting
Quiescent Current:
4 uA
Number of Output Lines:
8 Line
High Level Output Current:
- 24 mA
Low Level Output Current:
32 mA
Propagation Delay Time:
10.5 ns
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
SOIC-20
Packaging:
Reel
Function:
Transparent
Height:
2.35 mm
Length:
12.8 mm
Output Type:
3-State
Type:
D-Type
Width:
7.52 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
8 Channels
Number of Input Lines:
8 Line
Operating Supply Voltage:
5 V
Product Type:
Latches
Reset Type:
No Reset
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.019048 oz
Tags
SN74ACT533DWR, SN74ACT533DW, SN74ACT533D, SN74ACT533, SN74ACT53, SN74ACT5, SN74ACT, SN74AC, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC OCTAL D TRANSP LATCH 20-SOIC
***eco
OCTAL D-TYPE TRANSPARENT LATCH <AZ
***as Instruments
The ’ACT533 devices are octal transparent D-type latches with 3-state outputs. When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverted levels set up at the D inputs. A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. (OE)\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Availability
Stock:
Available
On Order:
4500
Enter Quantity:
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