TSB43AB23PGE

TSB43AB23PGE
Mfr. #:
TSB43AB23PGE
Description:
1394 Interface IC OHCI 1.1 1394a Link Layer Cntrlr Intgrt
Lifecycle:
New from this manufacturer.
Datasheet:
TSB43AB23PGE Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
More Information:
TSB43AB23PGE more Information TSB43AB23PGE Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
1394 Interface IC
RoHS:
Y
Mounting Style:
SMD/SMT
Package / Case:
LQFP-144
Series:
TSB43AB23
Product:
IEEE 1394a
Type:
OHCI Lynx Controller
Data Rate:
400 Mb/s
Minimum Operating Temperature:
0 C
Maximum Operating Temperature:
+ 70 C
Packaging:
Tray
Description/Function:
OHCI 1.1, 1394A LINK LAYER CONTROLLER INTEGRATED WITH A 1394A, 400MBPS, 3-PORT PHYSICAL LAYER (PHY)
Brand:
Texas Instruments
Moisture Sensitive:
Yes
Product Type:
1394 Interface IC
Protocol Supported:
1394
Factory Pack Quantity:
60
Subcategory:
Interface ICs
Unit Weight:
0.045518 oz
Tags
TSB43AB23P, TSB43AB23, TSB43AB2, TSB43AB, TSB43A, TSB43, TSB4, TSB
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: info@omo-ic.com

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
IEEE 1394a-2000 OHCI PHY/LINK Layer Controller Serial Interface 144-Pin LQFP Tray
***as Instruments
OHCI 1.1, 1394a link layer controller with integrated IEEE 1394a, 400-Mbps, 3-port PHY 144-LQFP 0 to 70
***ser
IEEE1394 (Firewire) OHCI 1.1, 1394a Link Layer Cntrlr Intgrt
***i-Key
IC PHY/LINK LAYER CTRLR 144-LQFP
***i-Key Marketplace
TSB43AB23 OHCI 1.1, 1394A LINK L
***ark
Controller IC; Device Type:PHY/Link Layer Controller; Package/Case:144-LQFP; No. of Pins:144; Operating Temperature Range:0°C to +70°C; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes; Data Rate:400Mbps ;RoHS Compliant: Yes
***as Instr.
The Texas Instruments TSB43AB23 device is an integrated 1394a-2000 OHCI PHY/link-layer controller (LLC) device that is fully compliant with the PCI Local Bus Specification, the PCI Bus Power Management Interface Specification (Revision 1.1), IEEE Std 1394-1995, IEEE Std 1394a-2000, and the 1394 Open Host Controller Interface Specification (Release 1.1). It is capable of transferring data between the 33-MHz PCI bus and the 1394 bus at 100M bits/s, 200M bits/s, and 400M bits/s. The TSB43AB23 device provides three 1394 ports that have separate cable bias (TPBIAS). The TSB43AB23 device also supports the IEEE Std 1394a-2000 power-down features for battery-operated applications and arbitration enhancements.
***as Instr.
As required by the 1394 Open Host Controller Interface Specification (OHCI) and IEEE Std 1394a-2000, internal control registers are memory-mapped and nonprefetchable. The PCI configuration header is accessed through configuration cycles specified by PCI, and it provides plug-and-play (PnP) compatibility. Furthermore, the TSB43AB23 device is compliant with the PCI Bus Power Management Interface Specification as specified by the PC 2001 Design Guide requirements. The TSB43AB23 device supports the D0, D1, D2, and D3 power states.
***as Instruments (TI)
The TSB43AB23 design provides PCI bus master bursting, and it is capable of transferring a cacheline of data at 132M bytes/s after connection to the memory controller. Because PCI latency can be large, deep FIFOs are provided to buffer the 1394 data.
***as Instr.
The TSB43AB23 device provides physical write posting buffers and a highly-tuned physical data path for SBP-2 performance. The TSB43AB23 device also provides multiple isochronous contexts, multiple cacheline burst transfers, and advanced internal arbitration.
***
An advanced CMOS process achieves low power consumption and allows the TSB43AB23 device to operate at PCI clock rates up to 33 MHz.
***AS INSRUMENT
The TSB43AB23 PHY-layer provides the digital and analog transceiver functions needed to implement a three-port node in a cable-based 1394 network. Each cable port incorporates two differential line transceivers. The transceivers include circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration, and for packet reception and transmission.
***AS INSTRUMENTS INC
The TSB43AB23 PHY-layer requires only an external 24.576-MHz crystal as a reference for the cable ports. An external clock may be provided instead of a crystal. An internal oscillator drives an internal phase-locked loop (PLL), which generates the required 393.216-MHz reference signal. This reference signal is internally divided to provide the clock signals that control transmission of the outbound encoded strobe and data information. A 49.152-MHz clock signal is supplied to the integrated LLC for synchronization and is used for resynchronization of the received data.
***OMO Electronic
Data bits to be transmitted through the cable ports are received from the integrated LLC and are latched internally in synchronization with the 49.152-MHz system clock. These bits are combined serially, encoded, and transmitted at 98.304M, 196.608M, or 393.216M bits/s (referred to as S100, S200, or S400 speeds, respectively) as the outbound data-strobe information stream. During transmission, the encoded data information is transmitted differentially on the twisted-pair B (TPB) cable pair(s), and the encoded strobe information is transmitted differentially on the twisted-pair A (TPA) cable pair(s).
***
During packet reception, the TPA and TPB transmitters of the receiving cable port are disabled, and the receivers for that port are enabled. The encoded data information is received on the TPA cable pair, and the encoded strobe information is received on the TPB cable pair. The received data-strobe information is decoded to recover the receive clock signal and the serial data bits. The serial data bits are resynchronized to the local 49.152-MHz system clock and sent to the integrated LLC. The received data is also transmitted (repeated) on the other active (connected) cable ports.
***as Instruments (TI)
Both the TPA and TPB cable interfaces incorporate differential comparators to monitor the line states during initialization and arbitration. The outputs of these comparators are used by the internal logic to determine the arbitration status. The TPA channel monitors the incoming cable common-mode voltage. The value of this common-mode voltage is used during arbitration to set the speed of the next packet transmission. In addition, the TPB channel monitors the incoming cable common-mode voltage on the TPB pair for the presence of the remotely supplied twisted-pair bias voltage.
***ASIN
The TSB43AB23 device provides a 1.86-V nominal bias voltage at the TPBIAS terminal for port termination. The PHY layer contains two independent TPBIAS circuits. This bias voltage, when seen through a cable by a remote receiver, indicates the presence of an active connection. This bias voltage source must be stabilized by an external filter capacitor of 1.0 µF.
***XS
The line drivers in the TSB43AB23 device operate in a high-impedance current mode and are designed to work with external 112- cable impedance. One network is provided at each end of a twisted-pair cable. Each network is composed of a pair of series-connected 56- resistors. The midpoint of the pair of resistors that is directly connected to the TPA terminals is connected to its corresponding TPBIAS voltage terminal. The midpoint of the pair of resistors that is directly connected to the TPB terminals is coupled to ground through a parallel R-C network with recommended values of 5 k and 220 pF. The values of the external line-termination resistors are designed to meet the standard specifications when connected in parallel with the internal receiver circuits. An external resistor connected between the R0 and R1 terminals sets the driver output current and other internal operating currents. This current-setting resistor has a value of 6.34 k ±1%.
***AS INTRUMENTS
When the power supply of the TSB43AB23 device is off and the twisted-pair cables are connected, the TSB43AB23 transmitter and receiver circuitry present a high impedance to the cable and do not load the TPBIAS voltage at the other end of the cable.
***AS INSTRUMENTS INC
When the device is in a low-power state (for example, D2 or D3) the TSB43AB23 device automatically enters a low-power mode if all ports are inactive (disconnected, disabled, or suspended). In this low-power mode, the TSB43AB23 device disables its internal clock generators and also disables various voltage and current reference circuits, depending on the state of the ports (some reference circuitry must remain active in order to detect new cable connections, disconnections, or incoming TPBIAS, for example). The lowest power consumption (the ultralow-power sleep mode) is attained when all ports are either disconnected or disabled with the port interrupt enable bit cleared.
***AS INSTRUMEN
The TSB43AB23 device exits the low-power mode when bit 19 (LPS) in the host controller control register at OHCI offset 50h/54h (see Section 4.16, Host Controller Control Register) is set to 1 or when a port event occurs which requires that the TSB43AB23 device to become active in order to respond to the event or to notify the LLC of the event (for example, incoming bias is detected on a suspended port, a disconnection is detected on a suspended port, or a new connection is detected on a nondisabled port). When the TSB43AB23 device is in the low-power mode, the internal 49.153-MHz clock becomes active (and the integrated PHY layer becomes operative) within 2 ms after bit 19 (LPS) in the host controller control register at OHCI offset 50h/54h (see Section 4.16, Host Controller Control Register) is set to 1.
***AS
The TSB43AB23 device supports hardware enhancements to better support digital video (DV) and MPEG data stream reception and transmission. These enhancements are enabled through the isochronous receive digital video enhancements register at OHCI offset A88h (see Chapter 5, TI Extension Registers). The enhancements include automatic timestamp insertion for transmitted DV and MPEG-formatted streams and common isochronous packet (CIP) header stripping for received DV streams.
***ASI
The CIP format is defined by the IEC 61883-1:1998 specification. The enhancements to the isochronous data contexts are implemented as hardware support for the synchronization timestamp for both DV and MPEG CIP formats. The TSB43AB23 device supports modification of the synchronization timestamp field to ensure that the value inserted via software is not stale—that is, the value is less than the current cycle timer when the packet is transmitted.
Part # Description Stock Price
TSB43AB23PGE
DISTI # 296-14328-ND
IC PHY/LINK LAYER CTRLR 144-LQFP
RoHS: Compliant
Min Qty: 60
Container: Tray
Temporarily Out of Stock
  • 60:$8.7350
TSB43AB23PGE
DISTI # TSB43AB23PGE
OHCI PHY/Link Layer Controller 144-Pin LQFP Tray - Trays (Alt: TSB43AB23PGE)
RoHS: Compliant
Min Qty: 60
Container: Tray
Americas - 0
  • 60:$7.0900
  • 120:$6.8900
  • 240:$6.5900
  • 360:$6.4900
  • 600:$6.2900
TSB43AB23PGE
DISTI # TSB43AB23PGE
OHCI PHY/Link Layer Controller 144-Pin LQFP Tray (Alt: TSB43AB23PGE)
RoHS: Compliant
Min Qty: 1
Container: Tray
Europe - 0
  • 1:€7.0900
  • 10:€6.6900
  • 25:€6.2900
  • 50:€5.8900
  • 100:€5.5900
  • 500:€5.2900
  • 1000:€5.0900
TSB43AB23PGEG4
DISTI # TSB43AB23PGEG4
OHCI PHY/Link Layer Controller 144-Pin LQFP Tray - Bulk (Alt: TSB43AB23PGEG4)
RoHS: Compliant
Min Qty: 118
Container: Bulk
Americas - 0
  • 118:$2.9900
  • 120:$2.8900
  • 238:$2.7900
  • 590:$2.6900
  • 1180:$2.5900
TSB43AB23PGE
DISTI # 595-TSB43AB23PGE
1394 Interface IC OHCI 1.1 1394a Link Layer Cntrlr Intgrt
RoHS: Compliant
114
  • 1:$10.1400
  • 10:$9.1600
  • 25:$8.4800
  • 100:$7.5900
  • 250:$7.2100
  • 500:$6.6100
  • 1000:$5.7600
TSB43AB23PGEG4
DISTI # 595-TSB43AB23PGEG4
1394 Interface IC OHCI 1.1 1394a Link Layer Cntrlr Intgrt
RoHS: Compliant
0
    TSB43AB23PGESerial I/O Controller, 1 Channel(s), 50MBps, CMOS, PQFP144
    RoHS: Compliant
    18263
    • 1000:$5.6100
    • 500:$5.9000
    • 100:$6.1400
    • 25:$6.4100
    • 1:$6.9000
    TSB43AB23PGEG4Serial I/O Controller, 1 Channel(s), 50MBps, CMOS, PQFP144
    RoHS: Compliant
    2975
    • 1000:$2.8000
    • 500:$2.9500
    • 100:$3.0700
    • 25:$3.2000
    • 1:$3.4500
    Image Part # Description
    TSB43AB23IPDTEP

    Mfr.#: TSB43AB23IPDTEP

    OMO.#: OMO-TSB43AB23IPDTEP

    1394 Interface IC Mil Enh OHCI PHY/ Link Layer Cntrlr
    TSB43AA82A

    Mfr.#: TSB43AA82A

    OMO.#: OMO-TSB43AA82A-1190

    New and Original
    TSB43AA82A1

    Mfr.#: TSB43AA82A1

    OMO.#: OMO-TSB43AA82A1-1190

    New and Original
    TSB43AA82IGGW

    Mfr.#: TSB43AA82IGGW

    OMO.#: OMO-TSB43AA82IGGW-1152

    1394 Interface IC 2Port Hi Perf Integ Phy&Link Layer Chip
    TSB43AB22

    Mfr.#: TSB43AB22

    OMO.#: OMO-TSB43AB22-1190

    New and Original
    TSB43AB32

    Mfr.#: TSB43AB32

    OMO.#: OMO-TSB43AB32-1190

    New and Original
    TSB43AA82APGEG4

    Mfr.#: TSB43AA82APGEG4

    OMO.#: OMO-TSB43AA82APGEG4-TEXAS-INSTRUMENTS

    IC PHY LINK LAYR HP 2PRT 144LQFP
    TSB43AA82AIPGEEP

    Mfr.#: TSB43AA82AIPGEEP

    OMO.#: OMO-TSB43AA82AIPGEEP-TEXAS-INSTRUMENTS

    1394 Interface IC Mil Enh Int PHY and Link-Layer Cntrl
    TSB43AB21AIPDTEP

    Mfr.#: TSB43AB21AIPDTEP

    OMO.#: OMO-TSB43AB21AIPDTEP-TEXAS-INSTRUMENTS

    1394 Interface IC Mil Enh Int OCHI pHY Link-Layer Cntrl
    TSB43AB21APDT

    Mfr.#: TSB43AB21APDT

    OMO.#: OMO-TSB43AB21APDT-TEXAS-INSTRUMENTS

    1394 Interface IC OHCI 1.1 1394a Link Layer Cntrlr Intgrt
    Availability
    Stock:
    Available
    On Order:
    1500
    Enter Quantity:
    Current price of TSB43AB23PGE is for reference only, if you want to get best price, please submit a inquiry or direct email to our sales team sales@omo-ic.com
    Reference price (USD)
    Quantity
    Unit Price
    Ext. Price
    60
    $8.48
    $508.80
    120
    $7.59
    $910.80
    300
    $7.21
    $2 163.00
    540
    $6.61
    $3 569.40
    1020
    $5.76
    $5 875.20
    Due to semiconductor in short supply from 2021,below price is the Normal price before 2021.please send inquire to confirm.
    Start with
    Newest Products
    Top