SN74AS175BDRE4

Mfr. #:: SN74AS175BDRE4
Description:: Flip Flops Octal Pos-Edge-Trig D-Typ F-F W/Clear
Lifecycle:: New from this manufacturer.
Datasheet:: SN74AS175BDRE4 Datasheet
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More Information:: SN74AS175BDRE4 more Information SN74AS175BDRE4 Product Details

Product Attribute
Attribute Value

Manufacturer:: Texas Instruments

Product Category:: Flip Flops

RoHS:: Y

Number of Circuits:: 7

Logic Family:: 74AS

Logic Type:: D-Type Flip-Flop

Polarity:: Inverting/Non-Inverting

Input Type:: Single-Ended

Output Type:: Differential

Propagation Delay Time:: 10 ns

High Level Output Current:: - 2 mA

Low Level Output Current:: 20 mA

Supply Voltage - Min:: 4.5 V

Supply Voltage - Max:: 5.5 V

Minimum Operating Temperature:: 0 C

Maximum Operating Temperature:: + 70 C

Mounting Style:: SMD/SMT

Package / Case:: SOP-16

Packaging:: Reel

Function:: D-Type Bus Interface

Height:: 1.58 mm

Length:: 9.9 mm

Width:: 3.91 mm

Brand:: Texas Instruments

Number of Channels:: 4

Number of Input Lines:: 3

Number of Output Lines:: 2

Operating Supply Voltage:: 4.5 V to 5.5 V

Product Type:: Flip Flops

Reset Type:: Master Reset

Factory Pack Quantity:: 1

Subcategory:: Logic ICs

Unit Weight:: 0.023492 oz

Tags: SN74AS175BD, SN74AS175, SN74AS17, SN74AS1, SN74AS, SN74A, SN74, SN7

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SN74AS175BDRE4 Description

***i-Key: IC D-TYPE POS TRG SNGL 16SOIC

***ark: Flip-Flop Logic IC; Logic Family:AS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:16-SOIC; No. of Pins:16; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes

***as Instruments: These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct-clear (CLR)\ input. The ALS175 and AS175B feature complementary outputs from each flip-flop. Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output. These circuits are fully compatible for use with most TTL circuits.

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On Order:: 2000
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SN74AS175BDRE4

Step1:Vacuum Packaging with PL

Step2:Anti-Static Bag

Step3:Packaging Boxes

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes