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CD74AC112M

CD74AC112M
Mfr. #:
CD74AC112M
Description:
Flip Flops Dual
Lifecycle:
New from this manufacturer.
Datasheet:
CD74AC112M Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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ECAD Model:
More Information:
CD74AC112M more Information CD74AC112M Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Flip Flops
RoHS:
Y
Number of Circuits:
2
Logic Family:
AC
Logic Type:
J-K Negative Edge Triggered Flip-Flop
Polarity:
Inverting/Non-Inverting
Input Type:
CMOS, LVTTL
Output Type:
Differential
Propagation Delay Time:
129 ns
High Level Output Current:
- 24 mA
Low Level Output Current:
24 mA
Supply Voltage - Min:
1.5 V
Supply Voltage - Max:
5.5 V
Minimum Operating Temperature:
- 55 C
Maximum Operating Temperature:
+ 125 C
Mounting Style:
SMD/SMT
Package / Case:
SOP-16
Packaging:
Tube
Function:
Dual
Height:
1.58 mm
Length:
9.9 mm
Operating Temperature Range:
- 55 C to + 125 C
Quiescent Current:
4 uA
Series:
CD74AC112
Width:
3.91 mm
Brand:
Texas Instruments
Number of Channels:
2
Number of Input Lines:
2
Number of Output Lines:
1
Operating Supply Voltage:
1.5 V to 5.5 V
Product Type:
Flip Flops
Reset Type:
Set, Reset
Factory Pack Quantity:
40
Subcategory:
Logic ICs
Unit Weight:
0.004998 oz
Tags
CD74AC112M, CD74AC11, CD74AC1, CD74AC, CD74A, CD74, CD7
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We provide 90-360 days warranty.

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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    S***v
    S***v
    BG

    I'm very satisfied

    2019-06-19
    O***b
    O***b
    SA

    Very fast shipping

    2019-02-04
***as Instruments
Dual Negative-Edge-Triggered J-K Flip-Flops with Set and eset 16-SOIC -55 to 125
***ical
Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC Tube
***ark
LOGIC, DUAL JK FLIP-FLOP, 16SOIC
***i-Key
IC FF JK TYPE DUAL 1BIT 16SOIC
***AS INS
The ’AC112 devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE)\ or clear (CLR)\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive (high), data at the J and K inputs meeting the setup-time requirements is transferred to the outputs on the negative-going edge of the clock pulse (CLK). Clock triggering occurs at a voltage level and is not directly related to the fall time of the clock pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by tying J and K high.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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Availability
Stock:
Available
On Order:
1984
Enter Quantity:
Current price of CD74AC112M is for reference only, if you want to get best price, please submit a inquiry or direct email to our sales team sales@omo-ic.com
Reference price (USD)
Quantity
Unit Price
Ext. Price
1
$0.77
$0.77
10
$0.64
$6.36
100
$0.41
$41.00
1000
$0.33
$328.00
2000
$0.30
$596.00
5000
$0.28
$1 385.00
10000
$0.27
$2 670.00
25000
$0.26
$6 425.00
Due to semiconductor in short supply from 2021,below price is the Normal price before 2021.please send inquire to confirm.
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