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SN74LVT8996IPWREP

SN74LVT8996IPWREP
Mfr. #:
SN74LVT8996IPWREP
Description:
Specialty Function Logic Mil Enhance 3.3V ABT 10B
Lifecycle:
New from this manufacturer.
Datasheet:
SN74LVT8996IPWREP Datasheet
Delivery:
DHL FedEx Ups TNT EMS
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ECAD Model:
More Information:
SN74LVT8996IPWREP more Information SN74LVT8996IPWREP Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Specialty Function Logic
RoHS:
Y
Series:
SN74LVT8996-EP
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
TSSOP-24
Packaging:
Reel
Operating Temperature Range:
- 40 C to + 85 C
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Product Type:
Specialty Function Logic
Factory Pack Quantity:
2000
Subcategory:
Logic ICs
Part # Aliases:
V62/04644-01YE
Unit Weight:
0.003157 oz
Tags
SN74LVT899, SN74LVT8, SN74LVT, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***NGYU ELECTRONICS
Enhanced Product 3.3-V Abt 10-Bit Multidrop-Addressable Ieee Std 1149.1 Tap Transceiver
***ical
Addressable Scan Port -40C to 85C 24-Pin TSSOP T/R
***i-Key
IC 10B ADDRSBL SCAN PORT 24TSSOP
***ponent Stockers
SPECIALTY MICROPROCESSOR CIRCUIT PDSO24
***AS INS
The SN74LVT8996 10-bit addressable scan port (ASP) is a member of the Texas Instruments SCOPE™ testability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit assemblies. Unlike most SCOPE™ devices, the ASP is not a boundary-scannable device, rather, it applies TI’s addressable-shadow-port technology to the IEEE Std 1149.1-1990 (JTAG) test access port (TAP) to extend scan access beyond the board level.
***as Instr.
This device is functionally equivalent to the ’ABT8996 ASPs. Additionally, it is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to interface to 5-V masters and/or targets.
***INS
Conceptually, the ASP is a simple switch that can be used to directly connect a set of multidrop primary TAP signals to a set of secondary TAP signals - for example, to interface backplane TAP signals to a board-level TAP. The ASP provides all signal buffering that might be required at these two interfaces. When primary and secondary TAPs are connected, only a moderate propagation delay is introduced - no storage/retiming elements are inserted. This minimizes the need for reformatting board-level test vectors for in-system use.
***AS INSTR
Most operations of the ASP are synchronous to the primary test clock (PTCK) input. PTCK is always buffered directly onto the secondary test clock (STCK) output.
***as Instruments Inc.
Upon power up of the device, the ASP assumes a condition in which the primary TAP is disconnected from the secondary TAP (unless the bypass signal is used, as below). This reset condition also can be entered by the assertion of the primary test reset (PTRST)\ input or by use of shadow protocol. PTRST\ is always buffered directly onto the secondary test reset (STRST)\ output, ensuring that the ASP and its associated secondary TAP can be reset simultaneously.
***AS
When connected, the primary test data input (PTDI) and primary test mode select (PTMS) input are buffered onto the secondary test data output (STDO) and secondary test mode select (STMS) output, respectively, while the secondary test data input (STDI) is buffered onto the primary test data output (PTDO). When disconnected, STDO is at high impedance, while PTDO is at high impedance, except during acknowledgment of a shadow protocol. Upon disconnect of the secondary TAP, STMS holds its last low or high level, allowing the secondary TAP to be held in its last stable state. Upon reset of the ASP, STMS is high, allowing the secondary TAP to be synchronously reset to the Test-Logic-Reset state.
***AS INSRUMENTS
In system, primary-to-secondary connection is based on shadow protocols that are received and acknowledged on PTDI and PTDO, respectively. These protocols can occur in any of the stable TAP states other than Shift-DR or Shift-IR (i.e., Test-Logic-Reset, Run-Test/Idle, Pause-DR or Pause-IR). The essential nature of the protocols is to receive/transmit an address via a serial bit-pair signaling scheme. When an address is received serially at PTDI that matches that at the parallel address inputs (A9-A0), the ASP serially retransmits its address at PTDO as an acknowledgment and then assumes the connected (ON) status, as above. If the received address does not match that at the address inputs, the ASP immediately assumes the disconnected (OFF) status without acknowledgment.
***OMO Electronic
The ASP also supports three dedicated addresses that can be received globally (that is, to which all ASPs respond) during shadow protocols. Receipt of the dedicated disconnect address (DSA) causes the ASP to disconnect in the same fashion as a nonmatching address. Reservation of this address for global use ensures that at least one address is available to disconnect all receiving ASPs. The DSA is especially useful when the secondary TAPs of multiple ASPs are to be left in different stable states. Receipt of the reset address (RSA) causes the ASP to assume the reset condition, as above. Receipt of the test-synchronization address (TSA) causes the ASP to assume a connect status (MULTICAST) in which PTDO is at high impedance but the connections from PTMS to STMS and PTDI to STDO are maintained to allow simultaneous operation of the secondary TAPs of multiple ASPs. This is useful for multicast TAP-state movement, simultaneous test operation (such as in Run-Test/Idle state), and scanning of common test data into multiple like scan chains. The TSA is valid only when received in the Pause-DR or Pause-IR TAP states.
***AS INSTRUMENT
Alternatively, primary-to-secondary connection can be selected by assertion of a low level at the bypass (BYP)\ input. This operation is asynchronous to PTCK and is independent of PTRST\ and/or power-up reset. This bypassing feature is especially useful in the board-test environment, since it allows the board-level automated test equipment (ATE) to treat the ASP as a simple transceiver. When the BYP\ input is high, the ASP is free to respond to shadow protocols. Otherwise, when BYP is low, shadow protocols are ignored.
***ASI
Whether the connected status is achieved by use of shadow protocol or by use of BYP\, this status is indicated by a low level at the connect (CON)\ output. Likewise, when the secondary TAP is disconnected from the primary TAP, the CON\ output is high.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
Part # Description Stock Price
SN74LVT8996IPWREP
DISTI # 296-22385-1-ND		IC 10B ADDRSBL SCAN PORT 24TSSOP
RoHS: Compliant
Min Qty: 1
Container: Cut Tape (CT)		1823In Stock
  • 500:$10.9772
  • 100:$12.3399
  • 10:$14.6110
  • 1:$15.9000
SN74LVT8996IPWREP
DISTI # 296-22385-6-ND		IC 10B ADDRSBL SCAN PORT 24TSSOP
RoHS: Compliant
Min Qty: 1
Container: Digi-Reel®		1823In Stock
  • 500:$10.9772
  • 100:$12.3399
  • 10:$14.6110
  • 1:$15.9000
SN74LVT8996IPWREP
DISTI # 296-22385-2-ND		IC 10B ADDRSBL SCAN PORT 24TSSOP
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)		Temporarily Out of Stock
  • 2000:$9.4080
SN74LVT8996IPWREP
DISTI # SN74LVT8996IPWREP		Addressable Scan Port 24-Pin TSSOP T/R - Tape and Reel (Alt: SN74LVT8996IPWREP)
RoHS: Compliant
Min Qty: 2000
Container: Reel		Americas - 0
  • 2000:$10.5900
  • 4000:$10.0900
  • 8000:$9.7900
  • 12000:$9.3900
  • 20000:$9.1900
SN74LVT8996IPWREPEnhanced Product 3.3-V Abt 10-Bit Multidrop-Addressable Ieee Std 1149.1 Tap Transceiver4000
  • 1000:$8.3500
  • 750:$8.3800
  • 500:$9.3400
  • 250:$10.1400
  • 100:$10.6600
  • 25:$12.2000
  • 10:$12.6400
  • 1:$13.6000
SN74LVT8996IPWREP
DISTI # 595-N74LVT8996IPWREP		Specialty Function Logic Mil Enhance 3.3V ABT 10B
RoHS: Compliant		0
  • 2000:$9.7800
V62/04644-01YE
DISTI # 595-V62/04644-01YE		Specialty Function Logic Mil Enhance 3.3V ABT 10B
RoHS: Compliant		0
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