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SN74ALS29854DWRG4

SN74ALS29854DWRG4
Mfr. #:
SN74ALS29854DWRG4
Description:
Bus Transceivers 8B To 9B Parity Bus TRNSCVR
Lifecycle:
New from this manufacturer.
Datasheet:
SN74ALS29854DWRG4 Datasheet
Delivery:
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ECAD Model:
More Information:
SN74ALS29854DWRG4 more Information SN74ALS29854DWRG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Bus Transceivers
RoHS:
Y
Logic Family:
ALS
Input Level:
TTL
Output Level:
TTL
Output Type:
3-State
High Level Output Current:
- 24 mA
Low Level Output Current:
48 mA
Propagation Delay Time:
13 ns
Supply Voltage - Max:
5.25 V
Supply Voltage - Min:
4.75 V
Minimum Operating Temperature:
0 C
Maximum Operating Temperature:
+ 70 C
Package / Case:
SOIC-24
Packaging:
Reel
Function:
Bus Transceiver with Parity Checker
Height:
2.35 mm
Length:
15.4 mm
Number of Circuits:
1
Product:
Bipolar
Technology:
Bipolar
Width:
7.52 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
8
Operating Supply Voltage:
5 V
Polarity:
Non-Inverting
Product Type:
Bus Transceivers
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.022025 oz
Tags
SN74ALS29854DWR, SN74ALS29854D, SN74ALS2985, SN74ALS298, SN74ALS29, SN74ALS2, SN74ALS, SN74AL, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR 8-9BIT INVERT 24SOIC
***ark
Transceiver Logic IC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Leaded Process Compatible:Yes; Logic Family:ALS; Package/Case:24-SOIC; Peak Reflow Compatible (260 C):Yes ;RoHS Compliant: Yes
***as Instruments
The SN74ALS29854 is an 8-bit to 9-bit parity transceiver designed for two-way communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the parity-error () output indicates whether or not an error in the B data has occurred. The output-enable (, ) inputs can be used to disable the device so that the buses are effectively isolated. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with an open-collector flag. can be either passed, sampled, stored, or cleared from the latch using the latch-enable () and clear () control inputs. When both OEA\ and OEB\ are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. The SN74ALS29854 is characterized for operation from 0°C to 70°C.
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Available
On Order:
5000
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