ADC3224IRGZR

Mfr. #:: ADC3224IRGZR
Description:: Analog to Digital Converters - ADC Dual 12-bit 125 Msps SLVDS ADC
Lifecycle:: New from this manufacturer.
Datasheet:: ADC3224IRGZR Datasheet
Delivery:: DHL FedEx Ups TNT EMS
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More Information:: ADC3224IRGZR more Information ADC3224IRGZR Product Details

Product Attribute
Attribute Value

Manufacturer:: Texas Instruments

Product Category:: Analog to Digital Converters - ADC

RoHS:: Y

Series:: ADC3224

Mounting Style:: SMD/SMT

Package / Case:: VQFN-48

Interface Type:: Serial LVDS

Minimum Operating Temperature:: - 40 C

Maximum Operating Temperature:: + 85 C

Packaging:: Reel

Features:: Low Power

Power Consumption:: 232 mW

Brand:: Texas Instruments

ENOB - Effective Number of Bits:: 11.4 Bit

Moisture Sensitive:: Yes

Product Type:: ADCs - Analog to Digital Converters

SFDR - Spurious Free Dynamic Range:: 93 dB

SINAD - Signal to Noise and Distortion Ratio:: 70.5 dB

Factory Pack Quantity:: 2500

Subcategory:: Data Converter ICs

Tags: ADC3224I, ADC3224, ADC322, ADC32, ADC3, ADC

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ADC3224IRGZR Description

***as Instruments: Dual-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter (ADC) 48-VQFN -40 to 85

***et: ADC Dual Pipelined 125Msps 12-bit LVDS/Serial 48-Pin VQFN T/R

***ark: Dual 12-bit 125 Msps SLVDS ADC's

***i-Key: IC ADC 12BIT PIPELINED 48VQFN

***AS INSTRUMEN: The ADC322x are a high-linearity, ultra-low power, dual-channel, 12-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC322x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. Optionally, a one-wire serial LVDS interface is available. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

ADC3224IRGZR More Information

ADC322x Dual-Channel 12-Bit ADCs: Texas Instrument ADC322x Dual-Channel 12-Bit Analog-to Digital Converters are a high-linearity, ultra-low power, dual-channel, 12-bit, 25-MSPS to 125-MSPS, analog-to-digital converters (ADCs). The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC322x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel.

ADC3x High-Speed 12/14-Bit ADCs: Texas Instrument ADC3x High-Speed 12/14-Bit Analog-to Digital Converters are a high-linearity, ultra-low power, dual-channel, 12 or 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converters (ADCs). These devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC3x supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12 or 14-bit output data from each channel.

Market price

Part #	Description	Stock	Price
ADC3224IRGZR DISTI # ADC3224IRGZR-ND	ANALOG TO DIGITAL CONVERTERS - A RoHS: Compliant Min Qty: 2500 Container: Tape & Reel (TR)	Temporarily Out of Stock	2500:$22.8967
ADC3224IRGZR DISTI # ADC3224IRGZR	ADC Dual Pipelined 125Msps 12-bit LVDS/Serial 48-Pin VQFN T/R - Tape and Reel (Alt: ADC3224IRGZR) RoHS: Compliant Min Qty: 2500 Container: Reel	Americas - 0	2500:$26.2900 5000:$24.9900 10000:$24.1900 15000:$23.3900 25000:$22.7900
ADC3224IRGZT DISTI # 595-ADC3224IRGZT	Analog to Digital Converters - ADC Dual-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter (ADC) 48-VQFN -40 to 85 RoHS: Compliant	0	250:$28.2700
ADC3224IRGZR DISTI # 595-ADC3224IRGZR	Analog to Digital Converters - ADC Dual-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter (ADC) 48-VQFN -40 to 85 RoHS: Compliant	0	2500:$25.0800
ADC3224IRGZ25 DISTI # 595-ADC3224IRGZ25	Analog to Digital Converters - ADC ADC3224 Eval Mod RoHS: Compliant	0

ADC3224IRGZR

Step1:Vacuum Packaging with PL

Step2:Anti-Static Bag

Step3:Packaging Boxes

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes