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SN74LVCH16540ADLR

SN74LVCH16540ADLR
Mfr. #:
SN74LVCH16540ADLR
Description:
Buffers & Line Drivers 16B Buffer Driver
Lifecycle:
New from this manufacturer.
Datasheet:
SN74LVCH16540ADLR Datasheet
Delivery:
DHL FedEx Ups TNT EMS
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ECAD Model:
More Information:
SN74LVCH16540ADLR more Information SN74LVCH16540ADLR Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Buffers & Line Drivers
RoHS:
Y
Number of Input Lines:
16 Input
Number of Output Lines:
16 Output
Polarity:
Inverting
Supply Voltage - Max:
3.6 V
Supply Voltage - Min:
1.65 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Mounting Style:
SMD/SMT
Package / Case:
SSOP-48
Packaging:
Reel
Function:
Buffer/Line Driver
Height:
2.59 mm
Length:
15.88 mm
Output Type:
3-State
Quiescent Current:
20 uA
Technology:
CMOS
Width:
7.49 mm
Brand:
Texas Instruments
Logic Family:
LVC
Logic Type:
CMOS
Number of Channels:
16
Supply Current - Max:
20 uA
High Level Output Current:
- 24 mA
Input Signal Type:
Single-Ended
Low Level Output Current:
24 mA
Operating Supply Voltage:
1.65 V to 3.6 V
Product Type:
Buffers & Line Drivers
Propagation Delay Time:
4.5 ns at 2.7 V
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.021175 oz
Tags
SN74LVCH16540, SN74LVCH165, SN74LVCH1, SN74LVCH, SN74LVC, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***et
Buffer/Line Driver 16-CH Inverting 3-ST CMOS 48-Pin SSOP
***i-Key
IC INVERTER DUAL 8-INPUT 48SSOP
***as Instruments
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation, and provides a high-performance bus interface for wide data paths. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all corresponding outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Availability
Stock:
Available
On Order:
4500
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