TMSDC6722BRFPA225

Mfr. #:: TMSDC6722BRFPA225
Description:: Digital Signal Processors & Controllers - DSP, DSC Fixed-Point DSPs TMS320 Platform
Lifecycle:: New from this manufacturer.
Datasheet:: TMSDC6722BRFPA225 Datasheet
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More Information:: TMSDC6722BRFPA225 more Information TMSDC6722BRFPA225 Product Details

Product Attribute
Attribute Value

Manufacturer:: Texas Instruments

Product Category:: Digital Signal Processors & Controllers - DSP, DSC

RoHS:: Y

Mounting Style:: SMD/SMT

Package / Case:: HTQFP-144

Series:: TMS320C6722B

Product:: DSPs

Core:: TMS320

Maximum Clock Frequency:: 225 MHz

Program Memory Size:: 384 kB

Data RAM Size:: 128 kB

Operating Supply Voltage:: 1.2 V

Minimum Operating Temperature:: - 40 C

Maximum Operating Temperature:: + 105 C

Packaging:: Tray

Program Memory Type:: Asynchronous RAM, ROM, SDR, SDRAM

Brand:: Texas Instruments

Data ROM Size:: 384 kB

Data Bus Width:: 32 bit

Instruction Type:: Floating Point

Moisture Sensitive:: Yes

Product Type:: DSP - Digital Signal Processors & Controllers

Factory Pack Quantity:: 60

Subcategory:: Embedded Processors & Controllers

Tradename:: TMS320

Unit Weight:: 0.036290 oz

Tags: TMSDC, TMSD, TMS

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TMSDC6722BRFPA225 Ratings and Reviews

P***j

All received, thank you.

2019-04-28

V***v

It's time.

2019-05-03

TMSDC6722BRFPA225 Description

***as Instruments: C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA 144-HTQFP -40 to 105

***et: DSP Floating-Point 32-Bit/64-Bit 225MHz 1800MIPS 144-Pin HTQFP EP

***ark: Digital Signal Processor IC; Series:C6000; DSP Type:Floating Point; MMAC:450; Core Frequency Typ:225MHz; Memory Size, RAM:128KB; Cache Memory On Chip L1/L2:32KB; External Memory Supported:Async RAM/ROM, SDR, SDRAM ;RoHS Compliant: Yes

***ment14 APAC: DSP, C6000, FLOATING POINT, TQFP144; MSL:MSL 4 - 72 hours; SVHC:No SVHC (20-Jun-2011); Base Number:6722; Cache on Chip L1/L2 Memory:32KB; Core Frequency Typ:225MHz; DSP Type:Floating Point; External Supported Memory:SDRAM, Async NOR Flash, SRAM, NAND Flash; Frequency:225MHz; IC Generic Number:6722BRFPA225; Interface Type:I2C, SPI; MMAC:450; No. of Pins:144; Operating Temperature Range:-40°C to +105°C; Package / Case:TQFP; RAM Memory Size:128KB; Series:TMS320; Supply Voltage Max:3.47V; Supply Voltage Min:3.13V; Termination Type:SMD

***AS INSTRUMENTS INC: The TMS320C672x is the next generation of Texas Instruments' C67x generation of high-performance 32-/64-bit floating-point digital signal processors. The TMS320C672x includes the TMS320C6727B, TMS320C6726B, TMS320C6722B, and TMS320C6720 devices.(1)

***AS INST: Enhanced C67x+ CPU. The C67x+ CPU is an enhanced version of the C67x CPU used on the C671x DSPs. It is compatible with the C67x CPU but offers significant improvements in speed, code density, and floating-point performance per clock cycle. At 350 MHz, the CPU is capable of a maximum performance of 2800 MIPS/2100 MFLOPS by executing up to eight instructions (six of which are floating-point instructions) in parallel each cycle. The CPU natively supports 32-bit fixed-point, 32-bit single-precision floating-point, and 64-bit double-precision floating-point arithmetic.

***AS INSTRUMENT: Efficient Memory System. The memory controller maps the large on-chip 256K-byte RAM and 384K-byte ROM as unified program/data memory. Development is simplified since there is no fixed division between program and data memory size as on some other devices.

***AS INSRUMENTS: The memory controller supports single-cycle data accesses from the C67x+ CPU to the RAM and ROM. Up to three parallel accesses to the internal RAM and ROM from three of the following four sources are supported:

***AS: The large (32K-byte) program cache translates to a high hit rate for most applications. This prevents most program/data access conflicts to the on-chip memory. It also enables effective program execution from an off-chip memory such as an SDRAM.

***ASI: High-Performance Crossbar Switch. A high-performance crossbar switch acts as a central hub between the different bus masters (CPU, dMAX, UHPI) and different targets (peripherals and memory). The crossbar is partially connected; some connections are not supported (for example, UHPI-to-peripheral connections).

***: Multiple transfers occur in parallel through the crossbar as long as there is no conflict between bus masters for a particular target. When a conflict does occur, the arbitration is a simple and deterministic fixed-priority scheme.

***ASI: The dMAX is given highest-priority since it is responsible for the most time-critical I/O transfers, followed next by the UHPI, and finally by the CPU.

***AS INST: dMAX Dual Data Movement Accelerator. The dMAX is a module designed to perform Data Movement Acceleration. The Data Movement Accelerator (dMAX) controller handles user-programmed data transfers between the internal data memory controller and the device peripherals on the C672x DSPs. The dMAX allows movement of data to/from any addressable memory space including internal memory, peripherals, and external memory.

***as Instruments (TI): The dMAX controller includes features such as the capability to perform three-dimensional data transfers for advanced data sorting, and the capability to manage a section of the memory as a circular buffer/FIFO with delay-tap based reading and writing of data. The dMAX controller is capable of concurrently processing two transfer requests (provided that they are to/from different source/destinations).

***AS INSTRUMEN: External Memory Interface (EMIF) for Flexibility and Expansion. The external memory interface on the C672x supports a single bank of SDRAM and a single bank of asynchronous memory. The EMIF data width is 16 bits wide on the C6726B, C6722B, and C6720 and 32 bits wide on the C6727B.

***AS INSTRUMEN: SDRAM support includes x16 and x32 SDRAM devices with 1, 2, or 4 banks.

***XS: The C6726B, C6722B, and C6720 support SDRAM devices up to 128M bits.

***AS INSTRUMEN: The C6727B extends SDRAM support to 256M-bit and 512M-bit devices.

***AS USD: Asynchronous memory support is typically used to boot from a parallel non-multiplexed NOR flash device that can be 8, 16, or 32 bits wide. Booting from larger flash devices than are natively supported by the dedicated EMIF address lines is accomplished by using general-purpose I/O pins for upper address lines.

***AS INSRUMENT: The asynchronous memory interface can also be configured to support 8- or 16-bit-wide NAND flash. It includes a hardware ECC calculation (for single-bit errors) that can operate on blocks of data up to 512 bytes.

***ASI: Universal Host-Port Interface (UHPI) for High-Speed Parallel I/O. The Universal Host-Port Interface (UHPI) is a parallel interface through which an external host CPU can access memories on the DSP.

***NS: Three modes are supported by the C672x UHPI:

***TEXAS: The UHPI can also be restricted to accessing a single page (64K bytes) of memory anywhere in the address space of the C672x; this page can be changed, but only by the C672x CPU. This feature allows the UHPI to be used for high-speed data transfers even in systems where security is an important requirement.

***XS: The UHPI is only available on the C6727B.

***INS: Multichannel Audio Serial Ports (McASP0, McASP1, and McASP2) - Up to 16 Stereo Channels I2S. The multichannel audio serial port (McASP) seamlessly interfaces to CODECs, DACs, ADCs, and other devices. It supports the ubiquitous IIS format as well as many variations of this format, including time division multiplex (TDM) formats with up to 32 time slots.

***OMO Electronic: Each McASP includes a transmit and receive section which may operate independently or synchronously; furthermore, each section includes its own flexible clock generator and extensive error-checking logic.

***AS INSRUMENTS: As data passes through the McASP, it can be realigned so that the fixed-point representation used by the application code can be independent of the representation used by the external devices without requiring any CPU overhead to make the conversion.

***AS INS: The McASP is a configurable module and supports between 2 and 16 serial data pins. It also has the option of supporting a Digital Interface Transmitter (DIT) mode with a full 384 bits of channel status and user data memory.

***AS INSTRUMENTS INCORPORATED: McASP2 is not available on the C6722B and C6720.

***AS INTRUMENTS: Inter-Integrated Circuit Serial Ports (I2C0, I2C1). The C672x includes two inter-integrated circuit (I2C) serial ports. A typical application is to configure one I2C serial port as a slave to an external user-interface microcontroller. The other I2C serial port may then be used by the C672x DSP to control external peripheral devices, such as a CODEC or network controller, which are functionally peripherals of the DSP device.

***AS INSTRU: The two I2C serial ports are pin-multiplexed with the SPI0 serial port.

***ASIN: Serial Peripheral Interface Ports (SPI0, SPI1). As in the case of the I2C serial ports, the C672x DSP also includes two serial peripheral interface (SPI) serial ports. This allows one SPI port to be configured as a slave to control the DSP while the other SPI serial port is used by the DSP to control external peripherals.

***as Instruments Inc.: The SPI ports support a basic 3-pin mode as well as optional 4- and 5-pin modes. The optional pins include a slave chip-select pin and an enable pin which implements handshaking automatically in hardware for maximum SPI throughput.

***AS INSTRUM: The SPI0 port is pin-multiplexed with the two I2C serial ports (I2C0 and I2C1). The SPI1 serial port is pin-multiplexed with five of the serial data pins from McASP0 and McASP1.

***AS INS: Real-Time Interrupt Timer (RTI). The real-time interrupt timer module includes:

***: Clock Generation (PLL and OSC). The C672x DSP includes an on-chip oscillator that supports crystals in the range of 12 MHz to 25 MHz. Alternatively, the clock can be provided externally through the CLKIN pin.

***as Instruments (TI): The DSP includes a flexible, software-programmable phase-locked loop (PLL) clock generator. Three different clock domains (SYSCLK1, SYSCLK2, and SYSCLK3) are generated by dividing down the PLL output. SYSCLK1 is the clock used by the CPU, memory controller, and memories. SYSCLK2 is used by the peripheral subsystem and dMAX. SYSCLK3 is used exclusively for the EMIF.

***AS INSRUMENTS: (1) Throughout the remainder of the document, TMS320C6727B (or C6727B), TMS320C6726B (or C6726B), TMS320C6722B (or C6722B), and/or TMS320C6720 (or C6720) will be referred to as TMS320C672x (or C672x).

TMSDC6722BRFPA225 More Information

TMS320C672x Digital Signal Processor: OMO Electronic´ TMS320C672x is a high-performance, 32-/64-bit floating-point digital signal processor. With the enhanced C67x+™ DSP core, new memory architecture and enhanced peripherals, TMS320C672x DSP-based devices offer substantially improved performance at lower price points than previous floating-point DSPs. The devices improve audio effects, deliver the highest digital audio quality, accelerate code development, and eliminate the need for prototyping hardware. The DSPs are ideal for a variety of professional audio, musical instruments, broadcast audio, and commercial audio applications, as well as a variety of industrial, biometric, control, and medical applications.

Processors: OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.

Market price

Part #	Description	Stock	Price
TMSDC6722BRFPA225 DISTI # 296-21424-ND	IC FLOATING-POINT DSP 144-TQFP RoHS: Compliant Min Qty: 1 Container: Tray	240In Stock	540:$14.0263 120:$15.4492 60:$17.2788 10:$18.0920 1:$19.6200
TMSDC6722BRFPA225 DISTI # TMSDC6722BRFPA225	DSP Floating-Point 32-Bit/64-Bit 225MHz 1800MIPS 144-Pin HTQFP EP - Trays (Alt: TMSDC6722BRFPA225) RoHS: Compliant Min Qty: 60 Container: Tray	Americas - 0	60:$16.8900 120:$16.4900 240:$15.8900 360:$15.4900 600:$15.1900
TMSDC6722BRFPA225 DISTI # TMSDC6722BRFPA225	DSP Floating-Point 32-Bit/64-Bit 225MHz 1800MIPS 144-Pin HTQFP EP (Alt: TMSDC6722BRFPA225) RoHS: Compliant Min Qty: 1	Europe - 0	1:€16.1900 10:€15.3900 25:€14.5900 50:€13.8900 100:€13.2900 500:€12.6900 1000:€12.1900
TMSDC6722BRFPA225	Floating-Point Digital Signal Processor	900	1000:$11.5500 750:$11.5900 500:$12.9100 250:$14.0300 100:$14.7400 25:$16.8700 10:$17.4800 1:$18.8000
TMSDC6722BRFPA225 DISTI # 595-TMSDC6722BRF225	Digital Signal Processors & Controllers - DSP, DSC Fixed-Point DSPs TMS320 Platform RoHS: Compliant	120	1:$19.6200 5:$18.8100 10:$18.1000 25:$17.2800 100:$15.4500 250:$14.7400 500:$14.0300
TMSDC6722BRFPA225 DISTI # 8184890P	DSP FLOATING 32/64-BIT 225MHZ HTQFP144, TU	50	5:£14.2100 10:£13.5700 25:£13.1000

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TMSDC6722BRFPA225

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Step1:
Vacuum Packaging with PL

Step2:
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Step3:
Packaging Boxes