SN74ALS992DWRG4

SN74ALS992DWRG4
Mfr. #:
SN74ALS992DWRG4
Description:
Latches 9B DType TRANPNT Read Back Latches
Lifecycle:
New from this manufacturer.
Datasheet:
SN74ALS992DWRG4 Datasheet
Delivery:
DHL FedEx Ups TNT EMS
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ECAD Model:
More Information:
SN74ALS992DWRG4 more Information SN74ALS992DWRG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Latches
RoHS:
Y
Number of Circuits:
1 Circuit
Logic Type:
D-Type Transparent Latch
Logic Family:
ALS
Polarity:
Non-Inverting
Number of Output Lines:
9 Line
High Level Output Current:
- 2.6 mA
Low Level Output Current:
32 mA
Propagation Delay Time:
16 ns
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
0 C
Maximum Operating Temperature:
+ 70 C
Package / Case:
SOIC-24
Packaging:
Reel
Function:
Transparent
Height:
2.35 mm
Length:
15.4 mm
Output Type:
3-State
Type:
D-Type
Width:
7.52 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
9 Channels
Number of Input Lines:
9 Line
Operating Supply Current:
80 mA
Operating Supply Voltage:
5 V
Product Type:
Latches
Reset Type:
No Reset
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.021006 oz
Tags
SN74ALS992DWR, SN74ALS992D, SN74ALS992, SN74ALS99, SN74ALS9, SN74ALS, SN74AL, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE LATCH SGL 3-ST 24SOIC
***ark
ICs, Latches Logic; Logic Family:ALS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:24-SOIC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; No. of Bits:9 ;RoHS Compliant: Yes
***as Instruments
This 9-bit latch is designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus. In addition, this device provides a 3-state buffer-type output and is easily implemented in parity applications. The nine latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. The Q outputs are in the 3-state condition when the output-enable () input is high. Read back is provided through the output-enable () input. When is taken low, the data present at the output of the data latches is allowed to pass back onto the input data bus. When is taken high, the output of the data latches is isolated from the D inputs. does not affect the internal operation of the latches; however, precautions should be taken not to create a bus conflict. The SN74ALS992 is characterized for operation from 0°C to 70°C.
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Availability
Stock:
Available
On Order:
4000
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