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SN74F2373DWG4

SN74F2373DWG4
Mfr. #:
SN74F2373DWG4
Description:
Latches 25Ohm Octal DTYPE Transparent Latch
Lifecycle:
New from this manufacturer.
Datasheet:
SN74F2373DWG4 Datasheet
Delivery:
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ECAD Model:
More Information:
SN74F2373DWG4 more Information SN74F2373DWG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Latches
RoHS:
Y
Number of Circuits:
1 Circuit
Logic Type:
D-Type Transparent Latch
Logic Family:
F
Polarity:
Non-Inverting
Number of Output Lines:
8 Line
High Level Output Current:
- 3 mA
Low Level Output Current:
32 mA
Propagation Delay Time:
7 ns at 5 V
Supply Voltage - Max:
5.5 V
Supply Voltage - Min:
4.5 V
Minimum Operating Temperature:
0 C
Maximum Operating Temperature:
+ 70 C
Package / Case:
SOIC-20
Packaging:
Tube
Function:
Transparent
Height:
2.35 mm
Length:
12.8 mm
Output Type:
3-State
Type:
D-Type
Width:
7.52 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
8 Channels
Number of Input Lines:
8 Line
Operating Supply Current:
66 mA
Operating Supply Voltage:
5 V
Product Type:
Latches
Reset Type:
No Reset
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.019048 oz
Tags
SN74F2373DW, SN74F2373D, SN74F23, SN74F2, SN74F, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE LATCH SGL 3-ST 20SOIC
***ark
ICs, Latches Logic; Latch Type:D-Type Transparent; Output Current:12mA; Propagation Delay:4.4ns; No. of Bits:8bit; Output Type:Tristate; Supply Voltage Range:4.5V to 5.5V; Logic Case Style:SOIC; No. of Pins:20 ;RoHS Compliant: Yes
***as Instruments
This 8-bit latch features 3-state outputs designed to sink up to 12 mA, and include 25- sink resitors to reduce overshoot and undershoot. The eight latches of the SN74F2373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When the LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. input does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN74F373 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN74F373 is characterized for operation from 0°C to 70°C.
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Available
On Order:
3000
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