SN74LVCH16652ADLR

SN74LVCH16652ADLR
Mfr. #:
SN74LVCH16652ADLR
Description:
IC TXRX NON-INVERT 3.6V 56SSOP
Lifecycle:
New from this manufacturer.
Datasheet:
SN74LVCH16652ADLR Datasheet
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ECAD Model:
More Information:
SN74LVCH16652ADLR more Information SN74LVCH16652ADLR Product Details
Product Attribute
Attribute Value
Tags
SN74LVCH16652ADL, SN74LVCH1665, SN74LVCH166, SN74LVCH1, SN74LVCH, SN74LVC, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56
***i-Key
IC BUS TRANSCVR 16BIT 56SSOP
***el Nordic
Contact for details
***as Instruments
This 16-bit bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation. The SN74LVCH16652A consists of D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The device can be used as two 8-bit transceivers or one 16-bit transceiver. Complementary output-enable (OEAB and OEBA\) inputs control the transceiver functions. Select-control (SAB and SBA) inputs select whether real-time or stored data is transferred. A low input level selects real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN74LVCH16652A. Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA\. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last level configuration. To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is not disabled by OE\ or DIR.
Part # Description Stock Price
SN74LVCH16652ADLR
DISTI # SN74LVCH16652ADLR-ND
IC TXRX NON-INVERT 3.6V 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LVCH16652ADLR
    DISTI # 595-74LVCH16652ADLR
    Bus Transceivers 16B Bus Transceiver
    RoHS: Compliant
    0
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      Availability
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      Available
      On Order:
      2500
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      Reference price (USD)
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      Due to semiconductor in short supply from 2021,below price is the Normal price before 2021.please send inquire to confirm.
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