SN74LS173ADRE4

SN74LS173ADRE4
Mfr. #:
SN74LS173ADRE4
Description:
Flip Flops 4-Bit D-type Reg With 3-State Outputs
Lifecycle:
New from this manufacturer.
Datasheet:
SN74LS173ADRE4 Datasheet
Delivery:
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ECAD Model:
More Information:
SN74LS173ADRE4 more Information SN74LS173ADRE4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Flip Flops
RoHS:
Y
Number of Circuits:
1
Logic Family:
74LS
Logic Type:
D-Type Register
Polarity:
Non-Inverting
Input Type:
Single-Ended
Output Type:
Single-Ended
Propagation Delay Time:
30 ns
High Level Output Current:
- 2.6 mA
Low Level Output Current:
24 mA
Supply Voltage - Min:
4.75 V
Supply Voltage - Max:
5.25 V
Minimum Operating Temperature:
0 C
Maximum Operating Temperature:
+ 70 C
Mounting Style:
SMD/SMT
Package / Case:
SOP-16
Packaging:
Reel
Function:
D-Type Bus Interface
Height:
1.58 mm
Length:
9.9 mm
Width:
3.91 mm
Brand:
Texas Instruments
Number of Channels:
4
Number of Input Lines:
2
Number of Output Lines:
1
Operating Supply Voltage:
4.75 V to 5.25 V
Product Type:
Flip Flops
Reset Type:
Master Reset
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.023492 oz
Tags
SN74LS173ADR, SN74LS173AD, SN74LS173, SN74LS17, SN74LS1, SN74LS, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 16SOIC
***eco
4-BIT D-TYPE REGISTER WITH 3-STATE<AZ
***ark
Flip-Flop Logic IC; Logic Family:LS; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Package/Case:16-SOIC; No. of Pins:16; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
***as Instruments
The '173 and 'LS173A 4-bit registers include D-type flip-flops featuring totem-pole 3-state outputs capable of driving highly capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide these flip-flops with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. Up to 128 of the SN74173 or SN74LS173A outputs can be connected to a common bus and still drive two Series 54/74 or 54LS/74LS TTL normalized loads, respectively. Similarly, up to 49 of the SN54173 or SN54LS173A outputs can be connected to a common bus and drive one additional Series 54/74 or 54LS/74LS TTL normalized load, respectively. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable times are shorter than the average output enable times. Gated enable inputs are provided on these devices for controlling the entry of data into the flip-flops. When both data-enable (G\1, G\2) inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the buffered clock input. Gate output-control (M, N) inputs also are provided. When both are low, the normal logic states (high or low levels) of the four outputs are available for driving the loads or bus lines. The outputs are disabled independently from the level of the clock by a high logic level at either output-control input. The outputs then present a high impedance and neither load nor drive the bus line. Detailed operation is given in the function table. The SN54173 and SN54LS173A are characterized for operation over the full military temperature range of -55C to 125C. The SN74173 and SN74LS173A are characterized for operation from 0C to 70C.
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Available
On Order:
4000
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