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74ALVCH16409DLRG4

74ALVCH16409DLRG4
Mfr. #:
74ALVCH16409DLRG4
Description:
Universal Bus Functions 9-Bit 4-Port Univ Bus Exchg W/3-St Otp
Lifecycle:
New from this manufacturer.
Datasheet:
74ALVCH16409DLRG4 Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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ECAD Model:
More Information:
74ALVCH16409DLRG4 more Information 74ALVCH16409DLRG4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Universal Bus Functions
RoHS:
Y
Logic Type:
Universal Bus Exchanger
Logic Family:
74AL
Number of Circuits:
1
Propagation Delay Time:
5.7 ns, 5.1 ns
Supply Voltage - Max:
3.6 V
Supply Voltage - Min:
1.65 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
SSOP-56
Packaging:
Reel
Function:
Registered Bus Exchanger
Height:
2.59 mm
Length:
18.41 mm
Organization:
9 x 2:2
Output Type:
3-State
Supply Type:
Single
Width:
7.49 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Input Lines:
18
Number of Output Lines:
18
High Level Output Current:
- 24 mA
Low Level Output Current:
24 mA
Maximum Clock Frequency:
0.12 GHz
Operating Supply Voltage:
1.8 V, 2.5 V, 3.3 V
Polarity:
Non-Inverting
Product Type:
Universal Bus Functions
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Unit Weight:
0.024508 oz
Tags
74ALVCH164, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS EXCHANGER 56SSOP
***eco
9-BIT, 4-PORT HIGH SPEED BUS EXCHANGER
***as Instruments
This 9-bit, 4-port universal bus exchanger is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16409 allows synchronous data exchange between four different buses. Data flow is controlled by the select (SEL0-SEL4) inputs. A data-flow state is stored on the rising edge of the clock (CLK) input if the select-enable (SELEN\) input is low. Once a data-flow state has been established, data is stored in the flip-flop on the rising edge of CLK if SELEN\ is high. The data-flow control logic is designed to allow glitch-free data transmission. When preset (PRE\) transitions high, the outputs are disabled immediately, without waiting for a clock pulse. To leave the high-impedance state, both PRE\ and SELEN\ must be low and a clock pulse must be applied. To ensure the high-impedance state during power up or power down, PRE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
Part # Description Stock Price
74ALVCH16409DLRG4
DISTI # 74ALVCH16409DLRG4-ND		IC UNIV BUS EXCHANGER 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)		Limited Supply - Call
    74ALVCH16409DLRG4
    DISTI # 595-74ALVCH16409DLRG    		Universal Bus Functions 9-Bit 4-Port Univ Bus Exchg W/3-St Otp
    RoHS: Compliant    		0
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      Availability
      Stock:
      Available
      On Order:
      1000
      Enter Quantity:
      Current price of 74ALVCH16409DLRG4 is for reference only, if you want to get best price, please submit a inquiry or direct email to our sales team sales@omo-ic.com
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