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SN74LVC646ADWRE4

SN74LVC646ADWRE4
Mfr. #:
SN74LVC646ADWRE4
Description:
Bus Transceivers Octal Bus Trncvr/Reg W/3-State Otpt
Lifecycle:
New from this manufacturer.
Datasheet:
SN74LVC646ADWRE4 Datasheet
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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ECAD Model:
More Information:
SN74LVC646ADWRE4 more Information SN74LVC646ADWRE4 Product Details
Product Attribute
Attribute Value
Manufacturer:
Texas Instruments
Product Category:
Bus Transceivers
RoHS:
Y
Logic Family:
74LVC
Input Level:
LVTTL
Output Level:
LVTTL
Output Type:
3-State
High Level Output Current:
- 24 mA
Low Level Output Current:
24 mA
Propagation Delay Time:
8.8 ns
Supply Voltage - Max:
3.6 V
Supply Voltage - Min:
1.65 V
Minimum Operating Temperature:
- 40 C
Maximum Operating Temperature:
+ 85 C
Package / Case:
SOIC-24
Packaging:
Reel
Function:
Bus Transceiver / Register
Height:
2.35 mm
Length:
15.4 mm
Number of Circuits:
8
Product:
CMOS
Technology:
CMOS
Width:
7.52 mm
Brand:
Texas Instruments
Mounting Style:
SMD/SMT
Number of Channels:
8
Supply Current - Max:
10 uA
Operating Supply Voltage:
1.65 V to 3.6 V
Polarity:
Non-Inverting
Product Type:
Bus Transceivers
Factory Pack Quantity:
1
Subcategory:
Logic ICs
Triggering Type:
Positive Edge
Unit Weight:
0.022025 oz
Tags
SN74LVC646ADWR, SN74LVC646ADW, SN74LVC646AD, SN74LVC646A, SN74LVC64, SN74LVC6, SN74LVC, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC BUS TRANSCEIVER 8BIT 24SOIC
***eco
OCTAL BUS XCEIVER AND REGISTER W/ 3-ST<AZ
***as Instruments
The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V VCC operation, and the SN74LVC646A octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation. These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that are performed with the ’LVC646A devices. Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at thehigh-impedance port is stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data is stored in one register and B data can be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Availability
Stock:
Available
On Order:
4000
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