1–4 Chapter 1: Cyclone III Device Family Overview
Cyclone III Device Family Features
Cyclone III Device Handbook July 2012 Altera Corporation
Volume 1
Table 12 lists Cyclone III device family package options, I/O pins, and differential
channel counts.
Table 1–2. Cyclone III Device Family Package Options, I/O pin and Differential Channel Counts
(1),
(2),
(3),
(4),
(5)
Family Package E144
(7)
M164 P240 F256 U256 F324 F484 U484 F780
Cyclone III
(8)
EP3C5 94, 22 106, 28 182, 68 182, 68
EP3C10 94, 22 106, 28 182, 68 182, 68
EP3C16 84, 19 92, 23 160, 47 168, 55 168, 55 346, 140 346, 140
EP3C25 82, 18 148, 43 156, 54 156, 54 215, 83
EP3C40 128, 26 195, 61 331, 127 331, 127 535, 227
(6)
EP3C55 327, 135 327, 135 377, 163
EP3C80 295, 113 295, 113 429, 181
EP3C120 283, 106 531, 233
Cyclone III
LS
EP3CLS70 294, 113 294, 113 429, 181
EP3CLS100 294, 113 294, 113 429, 181
EP3CLS150 226, 87 429, 181
EP3CLS200 226, 87 429, 181
Notes to Table 1–2:
(1) For each device package, the first number indicates the number of the I/O pin; the second number indicates the differential channel count.
(2) For more information about device packaging specifications, refer to the Cyclone III Package and Thermal Resistance webpage.
(3) The I/O pin numbers are the maximum I/O counts (including clock input pins) supported by the device package combination and can be affected
by the configuration scheme selected for the device.
(4) All packages are available in lead-free and leaded options.
(5) Vertical migration is not supported between Cyclone III and Cyclone III LS devices.
(6) The EP3C40 device in the F780 package supports restricted vertical migration. Maximum user I/Os are restricted to 510 I/Os if you enable
migration to the EP3C120 and are using voltage referenced I/O standards. If you are not using voltage referenced I/O standards, you can increase
the maximum number of I/Os.
(7) The E144 package has an exposed pad at the bottom of the package. This exposed pad is a ground pad that must be connected to the ground
plane on your PCB. Use this exposed pad for electrical connectivity and not for thermal purposes.
(8) All Cyclone III device UBGA packages are supported by the Quartus II software version 7.1 SP1 and later, with the exception of the UBGA
packages of EP3C16, which are supported by the Quartus II software version 7.2.
Chapter 1: Cyclone III Device Family Overview 1–5
Cyclone III Device Family Features
July 2012 Altera Corporation Cyclone III Device Handbook
Volume 1
Table 13 lists Cyclone III device family package sizes.
Table 14 lists Cyclone III device family speed grades.
Table 1–3. Cyclone III Device Family Package Sizes
Family Package Pitch (mm) Nominal Area (mm
2
) Length x Width (mm mm) Height (mm)
Cyclone III
E144 0.5 484 22 22 1.60
M164 0.5 64 8 8 1.40
P240 0.5 1197 34.6 34.6 4.10
F256 1.0 289 17 17 1.55
U256 0.8 196 14 14 2.20
F324 1.0 361 19 19 2.20
F484 1.0 529 23 23 2.60
U484 0.8 361 19 19 2.20
F780 1.0 841 29 29 2.60
Cyclone III LS
F484 1.0 529 23 23 2.60
U484 0.8 361 19 19 2.20
F780 1.0 841 29 29 2.60
Table 1–4. Cyclone III Device Family Speed Grades (Part 1 of 2)
Family Device E144 M164 P240 F256 U256 F324 F484 U484 F780
Cyclone III
EP3C5
C7, C8,
I7, A7
C7, C8,
I7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
———
EP3C10
C7, C8,
I7, A7
C7, C8,
I7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
———
EP3C16
C7, C8,
I7, A7
C7, C8,
I7
C8
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
EP3C25
C7, C8,
I7, A7
—C8
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
——
EP3C40 C8
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7, A7
C6, C7,
C8, I7
EP3C55
C6, C7,
C8, I7
C6, C7,
C8, I7
C6, C7,
C8, I7
EP3C80
C6, C7,
C8, I7
C6, C7,
C8, I7
C6, C7,
C8, I7
EP3C120 C7, C8, I7
C7, C8,
I7
1–6 Chapter 1: Cyclone III Device Family Overview
Cyclone III Device Family Architecture
Cyclone III Device Handbook July 2012 Altera Corporation
Volume 1
Table 15 lists Cyclone III device family configuration schemes.
Cyclone III Device Family Architecture
Cyclone III device family includes a customer-defined feature set that is optimized for
portable applications and offers a wide range of density, memory, embedded
multiplier, and I/O options. Cyclone III device family supports numerous external
memory interfaces and I/O protocols that are common in high-volume applications.
The Quartus II software features and parameterizable IP cores make it easier for you
to use the Cyclone III device family interfaces and protocols.
The following sections provide an overview of the Cyclone III device family features.
Logic Elements and Logic Array Blocks
The logic array block (LAB) consists of 16 logic elements and a LAB-wide control
block. An LE is the smallest unit of logic in the Cyclone III device family architecture.
Each LE has four inputs, a four-input look-up table (LUT), a register, and output logic.
The four-input LUT is a function generator that can implement any function with four
variables.
f For more information about LEs and LABs, refer to the Logic Elements and Logic Array
Blocks in the Cyclone III Device Family chapter.
Cyclone III
LS
EP3CLS70 C7, C8, I7 C7, C8, I7
C7, C8,
I7
EP3CLS100 C7, C8, I7 C7, C8, I7
C7, C8,
I7
EP3CLS150 C7, C8, I7
C7, C8,
I7
EP3CLS200 C7, C8, I7
C7, C8,
I7
Table 1–4. Cyclone III Device Family Speed Grades (Part 2 of 2)
Family Device E144 M164 P240 F256 U256 F324 F484 U484 F780
Table 1–5. Cyclone III Device Family Configuration Schemes
Configuration Scheme Cyclone III Cyclone III LS
Active serial (AS) v v
Active parallel (AP) v
Passive serial (PS) v v
Fast passive parallel (FPP) v v
Joint Test Action Group (JTAG) v v

EP3C16F256C6

Mfr. #:
Manufacturer:
Intel / Altera
Description:
FPGA - Field Programmable Gate Array FPGA - Cyclone III 963 LABs 168 IOs
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union