©2014 Silicon Storage Technology, Inc. DS20005053B 04/14
26
4 Mbit (x16) Multi-Purpose Flash Plus
SST39VF401C / SST39VF402C / SST39LF401C / SST39LF402C
Data Sheet
Figure 18:RST# Timing Diagram (When no internal operation is in progress)
Figure 19:RST# Timing Diagram (During Program or Erase operation)
Figure 20:AC Input/Output Reference Waveforms
25053 F29.0
RY/BY#
0V
RST#
CE#/OE#
T
RP
T
RHR
25053 F30.0
RY/BY#
CE#
OE#
T
RP
T
RY
T
BR
RST#
25053 F14.0
REFERENCE POINTS OUTPUTINPUT
V
IT
V
IHT
V
ILT
V
OT
AC test inputs are driven at V
IHT
(0.9 V
DD
) for a logic ‘1’ and V
ILT
(0.1 V
DD
) for a logic ‘0’. Measure-
ment reference points for inputs and outputs are V
IT
(0.5 V
DD
) and V
OT
(0.5 V
DD
). Input rise and
fall times (10% 90%) are <5 ns.
Note: V
IT
-V
INPUT
Test
V
OT
-V
OUTPUT
Test
V
IHT
-V
INPUT
HIGH Test
V
ILT
-V
INPUT
LOW Test
