PDF: 09005aef80a8e793/Source: 09005aef80a8e767 Micron Technology, Inc., reserves the right to change products or specifications without notice.
dd5c16_32x72h.fm - Rev. F 2/07 EN
7 ©2004 Micron Technology, Inc. All rights reserved.
128MB, 256MB: (x72, ECC, SR) 200-Pin DDR SODIMM
Electrical Specifications
Electrical Specifications
Stresses greater than those listed in Table 7 may cause permanent damage to the
module. This is a stress rating only, and functional operation of the module at these or
any other conditions above those indicated in each devices data sheet is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
Input Capacitance
Micron encourages designers to simulate the performance of the module to achieve
optimum values. Simulations are significantly more accurate and realistic than a gross
estimation of module capacitance when inductance and delay parameters associated
with trace lengths are used in simulations. JEDEC modules are currently designed using
simulations to close timing budgets.
Table 7: Absolute Maximum Ratings
Symbol Parameter/Condition Min Max Units
V
DD
VDD supply voltage relative to VSS
2.3 2.7 V
V
REF
I/O reference voltage
0.49 × VDDQ0.51 × VDDQV
V
TT
I/O termination voltage (system)
VREF - 0.04 VREF + 0.04 V
V
IH(DC)
Input high (logic 1) voltage
VREF + 0.15 VDD + 0.3 V
V
IL(DC)
Input low (logic 0) voltage
–0.3 VREF - 0.15 V
I
I
Input leakage current; Any input
0V V
IN VDD; VREF pin 0V VIN 1.35V
(All other pins not under test = 0V)
Command/address,
RAS#, CAS#, WE#,
CKE, S#, BA
–10 10 µA
CK0, CK0#,
CK1, CK1#
–4 4
DM, CK2, CK2#
–2 2
IOZ
Output leakage current
(DQ pins are disabled; 0V V
OUT VDDQ)
DQ, DQS
–5 5 µA
IOH
Output levels
High current (V
OUT
= V
DD
Q - 0.373V, MIN V
REF
, MIN V
TT
)
Low current (VOUT = 0.373V, MAX VREF, MAX VTT)
–16.8 mA
IOL 16.8 mA
I
OH
Output levels (reduced drive option)
High current (V
OUT
= V
DD
Q - 0.373V, MIN V
REF
, MIN V
TT
)
Low current (VOUT = 0.373V, MAX VREF, MAX VTT)
–9 mA
IOL 9–mA
T
A
Module ambient operating temperature Commercial
0+70°C
Industrial
–40 +85
PDF: 09005aef80a8e793/Source: 09005aef80a8e767 Micron Technology, Inc., reserves the right to change products or specifications without notice.
dd5c16_32x72h.fm - Rev. F 2/07 EN
8 ©2004 Micron Technology, Inc. All rights reserved.
128MB, 256MB: (x72, ECC, SR) 200-Pin DDR SODIMM
Electrical Specifications
Component AC Timing and Operating Conditions
Recommended AC operating conditions are given in the DDR component data sheets.
Component specifications are available on Microns Web site. Module speed grades
correlate with component speed grades, as shown in Table 8.
Table 8: Module and Component Speed Grades
Module Speed Grade Component Speed Grade
-40B -5B
-335 -6
-262 -75E
-26A -75Z
-265 -75
PDF: 09005aef80a8e793/Source: 09005aef80a8e767 Micron Technology, Inc., reserves the right to change products or specifications without notice.
dd5c16_32x72h.fm - Rev. F 2/07 EN
9 ©2004 Micron Technology, Inc. All rights reserved.
128MB, 256MB: (x72, ECC, SR) 200-Pin DDR SODIMM
Electrical Specifications
IDD Specifications
Tabl e 9: DDR IDD Specifications and Conditions – 128MB
Values shown for MT46V16M16 DDR SDRAM only and are computed from values specified in the
256Mb (16 Meg x 16) component data sheet
Parameter/Condition Symbol -335 -262
-26A/
-265 Units
Operating one bank active-precharge current:
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing once
per clock cycle; Address and control inputs changing once every two clock
cycles
IDD0 625 625 525 mA
Operating one bank active-read-precharge current: Burst = 4;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN);
I
OUT = 0mA; Address and control inputs changing once per clock cycle
IDD1 900 850 775 mA
Precharge power-down standby current: All device banks idle; Power-
down mode;
t
CK =
t
CK (MIN); CKE = (LOW)
IDD2P 20 20 20 mA
Idle standby current: CS# = HIGH; All device banks idle;
t
CK =
t
CK (MIN);
CKE = HIGH; Address and other control inputs changing once per clock
cycle; V
IN = VREF for DQ, DQS, and DM
IDD2F 250 225 225 mA
Active power-down standby current: One device bank active; Power-
down mode;
t
CK =
t
CK (MIN); CKE = LOW
IDD3P 150 125 125 mA
Active standby current: CS# = HIGH; CKE = HIGH; One device bank;
Active-precharge;
t
RC =
t
RAS (MAX);
t
CK =
t
CK (MIN); DQ, DM, and DQS
inputs changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
IDD3N 300 250 250 mA
Operating current: Burst = 2; Reads; Continuous burst; One device bank
active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); IOUT = 0mA
IDD4R 1,100 925 925 mA
Operating current: Burst = 2; Writes; Continuous burst; One device bank
active; Address and control inputs changing once per clock cycle;
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle
IDD4W 900 725 725 mA
Auto refresh current
t
REFC =
t
RFC (MIN)
IDD5 1,275 1,175 1,175 mA
t
REFC = 7.8125µs
IDD5A 30 30 30 mA
Self refresh current: CKE 0.2V
IDD6202020mA
Operating current: Four device bank interleaving READs (BL = 4) with
auto precharge;
t
RC =
t
RC (MIN);
t
CK =
t
CK (MIN); Address and control
inputs change only during active READ or WRITE commands
IDD7 2,200 1,900 1,900 mA

MT5VDDT1672HG-335F3

Mfr. #:
Manufacturer:
Micron
Description:
MODULE DDR SDRAM 128MB 200SODIMM
Lifecycle:
New from this manufacturer.
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