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In the event the user wants to deactivate the software data
protection feature for testing or reprogramming in an EEPROM
programmer, the following six step algorithm will reset the
internal protection circuit. After t
WC
, the X28HC64 will be in
standard operating mode.
Note: Once initiated, the sequence of write operations should not
be interrupted.
Resetting Software Data Protection
FIGURE 9. RESET SOFTWARE DATA PROTECTION TIMING SEQUENCE
FIGURE 10. SOFTWARE SEQUENCE TO DEACTIVATE SOFTWARE DATA PROTECTION
CE
WE
STANDARD
OPERATING
MODE
V
CC
DATA
ADDR
AAA
1555
55
0AAA
80
1555
t
WC
AA
1555
55
0AAA
20
1555
WRITE DATA 55
TO ADDRESS
0AAA
WRITE DATA 55
TO ADDRESS
0AAA
WRITE DATA 80
TO ADDRESS
1555
WRITE DATA AA
ADDRESS
1555
WRITE DATA 20
TO ADDRESS
1555
WRITE DATA AA
TO ADDRESS
1555
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System Considerations
Because the X28HC64 is frequently used in large memory arrays,
it is provided with a two-line control architecture for both read
and write operations. Proper usage can provide the lowest
possible power dissipation, and eliminate the possibility of
contention where multiple I/O pins share the same bus.
To gain the most benefit, it is recommended that CE
be decoded
from the address bus, and be used as the primary device
selection input. Both OE
and WE would then be common among
all devices in the array. For a read operation, this assures that all
deselected devices are in their standby mode, and that only the
selected device(s) is/are outputting data on the bus.
Because the X28HC64 has two power modes, standby and
active, proper decoupling of the memory array is of prime
concern. Enabling CE
will cause transient current spikes. The
magnitude of these spikes is dependent on the output capacitive
loading of the I/Os. Therefore, the larger the array sharing a
common bus, the larger the transient spikes. The voltage peaks
associated with the current transients can be suppressed by the
proper selection and placement of decoupling capacitors. As a
minimum, it is recommended that a 0.1µF high frequency
ceramic capacitor be used between V
CC
and V
SS
at each device.
Depending on the size of the array, the value of the capacitor
may have to be larger.
In addition, it is recommended that a 4.7µF electrolytic bulk
capacitor be placed between V
CC
and V
SS
for each eight devices
employed in the array. This bulk capacitor is employed to
overcome the voltage droop caused by the inductive effects of
the PC board traces.
FIGURE 11. NORMALIZED I
CC
(RD) BY TEMPERATURE
OVER FREQUENCY DATA PROTECTION
FIGURE 12. NORMALIZED I
CC
(RD) AT 25% OVER THE V
CC
RANGE
AND FREQUENCY
1.4
1.2
0.8
0.4
0.6
0.2
1.0
0M 10M 20M
- 55°C
+ 25°C
FREQUENCY (Hz)
+ 125°C
5.5V
CC
I
CC
RD
NORMALIZED (mA)
4.5V
CC
5.0V
CC
5.5V
CC
1.4
1.2
0.8
0.4
0.6
0.2
1.0
0M 10M 20M
FREQUENCY (Hz)
I
CC
RD
NORMALIZED (mA)
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Absolute Maximum Ratings Thermal Information
Temperature Under Bias
X28HC64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10°C to +85°C
X28HC64I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on any Pin with Respect to V
SS
. . . . . . . . . . . . . . . . . . . . .-1V to +7V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
32 Ld PLCC Package (Notes 7
, 9) . . . . . . . 41 19
28 Ld SOIC Package (Notes 7
, 9) . . . . . . . . 46 19
28 Ld PDIP Package (Notes 8
, 9). . . . . . . . 53 21
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
*Pb-free PDIPs can be used for through hole wave solder processing only.
They are not intended for use in Reflow solder processing applications.
Recommended Operating Conditions
Commercial Temperature Range . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial Temperature Range . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range
X28HC64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
7.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
8.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
9. For
JC
, the “case temp” location is taken at the package top center.
DC Electrical Specifications Over recommended operating conditions, unless otherwise specified.
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 10
)
TYP
(Note 11)
MAX
(Note 10)UNIT
V
CC
Current (Active) (TTL Inputs) I
CC
CE = OE = V
IL
, WE = V
IH
, All I/O’s = open, address
inputs = TTL levels at f = 10MHz
15 40 mA
V
CC
Current (Standby) (TTL Inputs) I
SB1
CE = V
IH
, OE = V
IL
All I/O’s = open, other inputs = V
IH
12mA
V
CC
Current (Standby) (CMOS Inputs) I
SB2
CE = V
CC
- 0.3V, OE = GND, All I/O’s = open, other
inputs = V
CC
- 0.3V
100 200 µA
Input Leakage Current I
LI
V
IN
= V
SS
to V
CC
±10 µA
Output Leakage Current I
LO
V
OUT
= V
SS
to V
CC
, CE = V
IH
±10 µA
Input LOW Voltage (Note 12
)V
lL
-1 0.8 V
Input HIGH Voltage (Note 12
)V
IH
2V
CC
+ 1 V
Output LOW Voltage V
OL
I
OL
= 5mA 0.4 V
Output HIGH Voltage V
OH
I
OH
= -5mA 2.4 V
NOTES:
10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
11. Typical values are for T
A
= +25°C and nominal supply voltage.
12. V
IL
minimum and V
IH
maximum are for reference only and are not tested.
Endurance and Data Retention The endurance and data retention specifications are established by characterization and are not
production tested.
PARAMETER MIN MAX UNIT
Minimum Endurance 100,000 Cycles
Data Retention 100 Years

X28HC64JIZ-90

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
EEPROM 8K X 8 EEPROM CMOS 3
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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