MT41K1G8TRF-125:E

TwinDie 1.35V DDR3L SDRAM
MT41K2G4 – 128 Meg x 4 x 8 Banks x 2 Ranks
MT41K1G8 – 64 Meg x 8 x 8 Banks x 2 Ranks
Description
The 8Gb (TwinDie) DDR3L SDRAM (1.35V) uses
Micron’s 4Gb DDR3L SDRAM die (essentially two
ranks of the 4Gb DDR3L SDRAM). Refer to Micron’s
4Gb DDR3 SDRAM data sheet for the specifications
not included in this document. Specifications for base
part number MT41K1G4 correlate to TwinDie manu-
facturing part number MT41K2G4; specifications for
base part number MT41K512M8 correlate to TwinDie
manufacturing part number MT41K1G8.
Features
Uses 4Gb Micron die
Two ranks (includes dual CS#, ODT, CKE, and ZQ
balls)
Each rank has eight internal banks for concurrent
operation
V
DD
= V
DDQ
= 1.35V (1.283–1.45V); backward com-
patible to V
DD
= V
DDQ
= 1.5V ±0.075V
1.35V center-terminated push/pull I/O
JEDEC-standard ball-out
Low-profile package
T
C
of 0°C to 95°C
0°C to 85°C: 8192 refresh cycles in 64ms
85°C to 95°C: 8192 refresh cycles in 32ms
Industrial temperature (IT) available (Rev. E)
Options Marking
Configuration
128 Meg x 4 x 8 banks x 2 ranks 2G4
64 Meg x 8 x 8 banks x 2 ranks 1G8
FBGA package (Pb-free)
78-ball FBGA
(10.5mm x 12mm x 1.2mm) Die
Rev :D
THE
78-ball FBGA
(9.5mm x 11.5mm x 1.2mm) Die
Rev :E
TRF
Timing – cycle time
1
1.071ns @ CL = 13 (DDR3L-1866) -107
1.25ns @ CL = 11 (DDR3L-1600) -125
1.5ns @ CL = 9 (DDR3L-1333) -15E
1.87ns @ CL = 7 (DDR3L-1066) -187E
Self refresh
Standard None
Operating temperature
Commercial (0°C T
C
95°C) None
Industrial (-40°C T
C
95°C) Rev. E IT
Revision :D/:E
Note:
1. CL = CAS (READ) latency.
Table 1: Key Timing Parameters
Speed Grade Data Rate (MT/s) Target
t
RCD-
t
RP-CL
t
RCD (ns)
t
RP (ns) CL (ns)
-107
1
,
2
,
3
1866 13-13-13 13.91 13.91 13.91
-125
1
,
2
1600 11-11-11 13.75 13.75 13.75
-15E
1
1333 9-9-9 13.5 13.5 13.5
-187E 1066 7-7-7 13.1 13.1 13.1
Notes:
1. Backward compatible to 1066, CL = 7 (-187E).
2. Backward compatible to 1333, CL = 9 (-15E).
3. Backward compatible to 1600, CL = 11 (-125).
8Gb: x4, x8 TwinDie DDR3L SDRAM
Description
PDF: 09005aef84787542
DDR3L_8Gb_x4_x8_2CS_TwinDie.pdf - Rev. F 05/13 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
Table 2: Addressing
Parameter 2048 Meg x 4 1024 Meg x 8
Configuration 128 Meg x 4 x 8 banks x 2 ranks 64 Meg x 8 x 8 banks x 2 ranks
Refresh count 8K 8K
Row address 64K A[15:0] 64K A[15:0]
Bank address 8 BA[2:0] 8 BA[2:0]
Column address 2K A[11, 9:0] 1K A[9:0]
8Gb: x4, x8 TwinDie DDR3L SDRAM
Description
PDF: 09005aef84787542
DDR3L_8Gb_x4_x8_2CS_TwinDie.pdf - Rev. F 05/13 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
Ball Assignments and Descriptions
Figure 1: 78-Ball FBGA Ball Assignments (Top View)
4 65
A
B
C
D
E
F
G
H
J
K
L
M
N
1
V
SS
V
SS
V
DDQ
V
SSQ
V
REFDQ
ODT1
ODT0
CS1#
V
SS
V
DD
V
SS
V
DD
V
SS
2
V
DD
V
SSQ
DQ2
NF, DQ6
V
DDQ
V
SS
V
DD
CS0#
BA0
A3
A5
A7
RESET#
3
NC
DQ0
DQS
DQS#
NF, DQ4
RAS#
CAS#
WE#
BA2
A0
A2
A9
A13
7
NF, NF/TDQS#
DM, DM/TDQS
DQ1
V
DD
NF, DQ7
CK
CK#
A10/AP
A15
A12/BC#
A1
A11
A14
8
V
SS
V
SSQ
DQ3
V
SS
NF, DQ5
V
SS
V
DD
ZQ0
V
REFCA
BA1
A4
A6
A8
9
V
DD
V
DDQ
V
SSQ
V
SSQ
V
DDQ
CKE1
CKE0
ZQ1
V
SS
V
DD
V
SS
V
DD
V
SS
Note:
1. Dark balls (with ring) designate balls that differ from the monolithic versions.
8Gb: x4, x8 TwinDie DDR3L SDRAM
Ball Assignments and Descriptions
PDF: 09005aef84787542
DDR3L_8Gb_x4_x8_2CS_TwinDie.pdf - Rev. F 05/13 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.

MT41K1G8TRF-125:E

Mfr. #:
Manufacturer:
Micron
Description:
IC DRAM 8G PARALLEL 78FBGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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