MCP14E3/MCP14E4/MCP14E5
DS22062B-page 10 © 2008 Microchip Technology Inc.
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, T
A
= +25°C with 4.5V V
DD
18V.
FIGURE 2-19: Input Threshold vs.
Temperature.
FIGURE 2-20: Input Threshold vs. Supply
Voltage.
FIGURE 2-21: Enable Threshold vs.
Temperature.
FIGURE 2-22: Enable Hysteresis vs.
Temperature.
FIGURE 2-23: Crossover Energy vs.
Supply Voltage.
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
Input Threshold (V)
V
HI
V
LO
V
DD
= 18V
1.0
1.2
1.4
1.6
1.8
2.0
4 6 8 1012141618
Supply Voltage (V)
Input Threshold (V)
V
HI
V
LO
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
3.1
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
Enable Threshold (V)
V
EN_H
V
EN_L
V
DD
= 12V
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C)
Enable Hysteresis (V)
V
DD
= 12V
1E-09
1E-08
1E-07
1E-06
4 6 8 1012141618
Supply Voltage (V)
Crossover Energy (A*sec)
Note: The values on this graph represent the
loss seen by both drivers in a package
during one complete cycle.
For a single driver, divide the stated
value by 2.
For a signal transition of a single driver,
divide the state value by 4.
© 2008 Microchip Technology Inc. DS22062B-page 11
MCP14E3/MCP14E4/MCP14E5
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
3.1 Control Inputs A and B
The MOSFET driver inputs are a high-impedance TTL/
CMOS compatible input. The inputs also have hystere-
sis between the high and low input levels, allowing
them to be driven from slow rising and falling signals
and to provide noise immunity.
3.2 Outputs A and B
Outputs A and B are CMOS push-pull outputs that are
capable of sourcing and sinking 4.0A of peak current
(V
DD
= 18V). The low output impedance ensures the
gate of the MOSFET will stay in the intended state even
during large transients. These outputs also have a
reverse latch-up rating of 1.5A.
3.3 Supply Input (V
DD
)
V
DD
is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local ceramic capacitor.
This bypass capacitor provides a localized low-imped-
ance path for the peak currents that are to be provided
to the load.
3.4 Ground (GND)
Ground is the device return pin. The ground pin(s)
should have a low impedance connection to the bias
supply source return. High peak currents will flow out
the ground pin(s) when the capacitive load is being
discharged.
3.5 Enable A (ENB_A)
The ENB_A pin is the enable control for Output A. This
enable pin is internally pulled up to V
DD
for active high
operation and can be left floating for standard
operation. When the ENB_A pin is pulled below the
enable pin Low Level Input Voltage (V
EN_L
), Output A
will be in the off state regardless of the input pin state.
3.6 Enable B (ENB_B)
The ENB_B pin is the enable control for Output B. This
enable pin is internally pulled up to V
DD
for active high
operation and can be left floating for standard
operation. When the ENB_B pin is pulled below the
enable pin Low-Level Input Voltage (V
EN_L
), Output B
will be in the off state regardless of the input pin state.
3.7 DFN Exposed Pad
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
TABLE 3-1: PIN FUNCTION TABLE
8-Pin
PDIP, SOIC
8-Pin
6x5 DFN
Symbol Description
1 1 ENB_A Output A Enable
2 2 IN A Input A
3 3 GND Ground
4 4 IN B Input B
5 5 OUT B Output B
66V
DD
Supply Input
7 7 OUT A Output A
8 8 ENB_B Output B Enable
PAD NC Exposed Metal Pad
Note: Duplicate pins must be connected for proper operation.
MCP14E3/MCP14E4/MCP14E5
DS22062B-page 12 © 2008 Microchip Technology Inc.
4.0 APPLICATION INFORMATION
4.1 General Information
MOSFET drivers are high-speed, high current devices
which are intended to source/sink high peak currents to
charge/discharge the gate capacitance of external
MOSFETs or IGBTs. In high frequency switching power
supplies, the PWM controller may not have the drive
capability to directly drive the power MOSFET. A MOS-
FET driver like the MCP14E3/MCP14E4/MCP14E5
family can be used to provide additional source/sink
current capability.
An additional degree of control has been added to the
MCP14E3/MCP14E4/MCP14E5 family. There are
separate enable functions for each driver that allow for
the immediate termination of the output pulse
regardless of the state of the input signal.
4.2 MOSFET Driver Timing
The ability of a MOSFET driver to transition from a fully
off state to a fully on state are characterized by the
drivers rise time (t
R
), fall time (t
F
), and propagation
delays (t
D1
and t
D2
). The MCP14E3/MCP14E4/
MCP14E5 family of drivers can typically charge and
discharge a 2200 pF load capacitance in 15 ns along
with a typical matched propagation delay of 50 ns.
Figure 4-1 and Figure 4-2 show the test circuit and
timing waveform used to verify the MCP14E3/
MCP14E4/MCP14E5 timing.
FIGURE 4-1: Inverting Driver Timing
Waveform.
FIGURE 4-2: Non-Inverting Driver Timing
Waveform.
4.3 Enable Function
The ENB_A and ENB_B enable pins allow for indepen-
dent control of OUT A and OUT B respectively. They
are active high and are internally pulled up to V
DD
so
that the default state is to enable the driver. These pins
can be left floating for normal operation.
When an enable pin voltage is above the enable pin
high threshold voltage, V
EN_H
(2.4V typical), that driver
output is enabled and allowed to react to changes in
the INPUT pin voltage state. Likewise, when the enable
pin voltage falls below the enable pin low threshold
voltage, V
EN_L
(2.0V typical), that driver output is dis-
abled and does not respond the changes in the INPUT
pin voltage state. When the driver is disabled, the out-
put goes to a low state. Refer to Table 4-1 for enable
pin logic. The threshold voltages of the enable function
are compatible with logic levels. Hysteresis is provided
to help increase the noise immunity of the enable
function, avoiding false triggers of the enable signal
during driver switching. For robust designs, it is
recommended that the slew rate of the enable pin
signal be greater than 1 V/ns.
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, t
D3
and t
D4
, are
graphically represented in Figure 4-3.
0.1 µF
+5V
10%
90%
10%
90%
10%
90%
18V
F
0V
0V
MCP14E3
C
L
= 2200 pF
Input
Input
Output
t
D1
t
F
t
D2
Output
t
R
V
DD
= 18V
Ceramic
Input
(1/2 MCP14E5)
90%
Input
t
D1
t
F
t
D2
Output
t
R
10%
10%
10%
+5V
18V
0V
0V
90%
90%
0.1 µF
F
MCP14E4
C
L
= 2200 pF
Input Output
V
DD
= 18V
Ceramic
Input
(1/2 MCP14E5)

MCP14E5-E/MF

Mfr. #:
Manufacturer:
Microchip Technology
Description:
Gate Drivers 45A Dual MOSFET Driver
Lifecycle:
New from this manufacturer.
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