XC18V00 Series In-System-Programmable Configuration PROMs
DS026 (v5.2) January 11, 2008 www.xilinx.com
Product Specification 19
R
AC Characteristics Over Operating Conditions When Cascading for XC18V04 and
XC18V02
CLK
DATA
CE
CEO
First Bit
Last Bit
T
CDF
DS026_07_020300
OE/RESET
T
OCK
T
OOE
T
OCE
Symbol Description Min Max Units
T
CDF
CLK to data float delay
(2,3)
–25ns
T
OCK
CLK to CEO delay
(3)
–20ns
T
OCE
CE to CEO delay
(3)
–20ns
T
OOE
OE/RESET to CEO delay
(3)
–20ns
Notes:
1. AC test load = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
5. For cascade mode:
T
CYC
min = T
OCK
+ T
CE
+ FPGA DIN-to-CCLK setup time
T
CAC
min = T
OCK
+ T
CE
XC18V00 Series In-System-Programmable Configuration PROMs
DS026 (v5.2) January 11, 2008 www.xilinx.com
Product Specification 20
R
AC Characteristics Over Operating Conditions When Cascading for XC18V01 and
XC18V512
CLK
DATA
CE
CEO
First Bit
Last Bit
T
CDF
DS026_07_020300
OE/RESET
T
OCK
T
OOE
T
OCE
Symbol Description Min Max Units
T
CDF
CLK to data float delay
(2,3)
–25ns
T
OCK
CLK to CEO delay
(3)
–20ns
T
OCE
CE to CEO delay
(3)
–20ns
T
OOE
OE/RESET to CEO delay
(3)
–20ns
Notes:
1. AC test load = 50 pF.
2. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3. Guaranteed by design, not tested.
4. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
5. For cascade mode:
T
CYC
min = T
OCK
+ T
CE
+ FPGA DIN-to-CCLK setup time
T
CAC
min = T
OCK
+ T
CE
XC18V00 Series In-System-Programmable Configuration PROMs
DS026 (v5.2) January 11, 2008 www.xilinx.com
Product Specification 21
R
Ordering Information
Valid Ordering Combinations
XC18V04VQ44C XC18V02VQ44C XC18V01VQ44C XC18V512VQ44C
XC18V04PC44C XC18V02PC44C XC18V01PC20C XC18V512PC20C
XC18V04VQG44C XC18V02VQG44C XC18V01SO20C XC18V512SO20C
XC18V04PCG44C XC18V02PCG44C XC18V01VQG44C XC18V512VQG44C
XC18V01PCG20C XC18V512PCG20C
XC18V01SOG20C XC18V512SOG20C
Package Type
VQ44 = 44-pin Plastic Quad Flat Package
VQG44 = 44-pin Plastic Quad Flat Package, Pb-free
PC44 = 44-pin Plastic Chip Carrier
(1)
PCG44 = 44-pin Plastic Chip Carrier, Pb-free
(1)
SO20 = 20-pin Small-Outline Package
(2)
SOG20 = 20-pin Small-Outline Package, Pb-free
(2)
PC20 = 20-pin Plastic Leaded Chip Carrier
(2)
PCG20 = 20-pin Plastic Leaded Chip Carrier, Pb-free
(2)
Notes:
1. XC18V04 and XC18V02 only.
2. XC18V01 and XC18V512 only.
XC18V04 VQ44 C
Operating Range
C = Industrial (T
A
= –40° C to +85° C)
Device Number
XC18V04
XC18V02
XC18V01
XC18V512

XC18V512PC20C

Mfr. #:
Manufacturer:
Xilinx
Description:
FPGA - Configuration Memory
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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