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LTC3225EDDB-1#TRMPBF

P1-P3P4-P6P7-P9P10-P12P13-P14
LTC3225/LTC3225-1
7
3225fb
OPERATION
Once the output voltage is charged to the preset volt-
age threshold, the part shuts down the internal charge
pump and enters into a low current state. In this state,
the LTC3225/LTC3225-1 consume only about 20A
from the input supply. The current drawn from C
OUT
is
approximately 2µA.
Automatic Cell Balancing
Due to manufacturing tolerances, capacitance and leakage
current can vary from supercapacitor to supercapacitor.
Without the automatic cell balancing scheme used in the
LTC3225/LTC3225-1, the voltages across the supercapaci-
tors could differ from each other and potentially overvoltage
a cell. This can affect the performance and lifetime of a
supercapacitor.
The LTC3225/LTC3225-1 constantly monitor the volt-
age across both supercapacitors while charging. When
the voltage across the supercapacitors is equal, both
capacitors are charged with equal currents. If the voltage
across one supercapacitor is lower than the other, the
lower supercapacitor’s charge current is increased and
the higher supercapacitor’s charge current is decreased.
The greater the difference between the supercapacitor
voltages, the greater the difference in charge current per
capacitor. The charge currents can increase or decrease
as much as 50% to balance the voltage across the su-
percapacitors. When the cell voltages are balanced, the
supercapacitors are charged at a rate of approximately:
I
COUT
=
1
2
•I
VIN
If the leakage currents or capacitances of the two superca-
pacitors are mismatched enough that varying the charge
current is not suffi cient to balance their voltages, the
LTC3225/LTC3225-1 stop charging the capacitor with the
higher voltage until they are again balanced. This feature
protects either capacitor from experiencing an overvoltage
condition. Attempting to equalize the voltages using parallel
resistors wastes power, discharges the supercapacitors,
and takes time to equalize the voltages. A 30% capacitance
mismatch leads to a 30% initial voltage difference after
charging. It takes hours to equalize the voltages across
1F supercapacitors using 10k resistors.
Shutdown Mode
Asserting SHDN low causes the LTC3225/LTC3225-1 to
enter shutdown mode. With the SHDN pin connected to
V
IN
and the input supply removed or grounded, less than
1µA is consumed from the output, allowing the superca-
pacitors to remain charged.
If the input supply is present at V
IN
and the SHDN pin is
grounded, the LTC3225/LTC3225-1 draw approximately
1µA of supply current. With the voltage at the C
OUT
pin
discharged to 0V, this current drops to less than 1µA. Since
the SHDN pin is a high impedance CMOS input, it should
never be allowed to fl oat.
Output Voltage Programming
The LTC3225/LTC3225-1 have a V
SEL
input pin that allows
the user to set the output threshold voltage to either 4.8V
or 5.3V for the LTC3225 and 4V or 4.5V for the LTC3225-1
by forcing a low or high at the V
SEL
pin respectively.
Output Status Indicator (PGOOD)
During shutdown, the PGOOD pin is high impedance. When
the charge cycle starts, an internal N-channel MOSFET
pulls the PGOOD pin to ground. When the output voltage,
V
OUT
, is within 6% (typical) of its fi nal value, the PGOOD
pin becomes high impedance, but charge current continues
to fl ow until V
OUT
crosses the charge termination voltage.
When V
OUT
drops 7% below the charge termination volt-
age, the PGOOD pin again pulls low.
Current Limit/Thermal Protection
The LTC3225/LTC3225-1 have built-in current limit as well
as overtemperature protection. If the PROG pin is shorted
to ground, a protection circuit automatically shuts off the
internal charge pump. At higher temperatures, or if the
input voltage is high enough to cause excessive self-heat-
ing of the part, the thermal shutdown circuitry shuts down
the charge pump once the junction temperature exceeds
approximately 150°C. It will enable the charge pump once
the junction temperature drops back to approximately
135°C. The LTC3225/LTC3225-1 are able to cycle in and
out of thermal shutdown indefi nitely without latch-up or
damage until the overcurrent condition is removed.
LTC3225/LTC3225-1
8
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APPLICATIONS INFORMATION
Programming Charge Current
The charge current is programmed with a single resistor
connecting the PROG pin to ground. The program resistor
and the input/output charge currents are calculated using
the following equations:
I
VIN
=
3600V
R
PROG
I
OUT
=
I
VIN
2
(with matched output capacitors)
An R
PROG
resistor value of 2k or less (i.e., short circuit)
causes the LTC3225/LTC3225-1 to enter overcurrent
shutdown mode. This mode prevents damage to the part
by shutting down the internal charge pump.
Power Effi ciency
The power effi ciency (η) of the LTC3225/LTC3225-1 is
similar to that of a linear regulator with an effective input
voltage of twice the actual input voltage. In an ideal regulat-
ing voltage doubler the power effi ciency is given by:
η
2xIDEAL
=
P
OUT
P
IN
=
V
OUT
•I
OUT
V
IN
•2I
OUT
=
V
OUT
2V
IN
At moderate to high output power the switching losses
and quiescent current of the LTC3225/LTC3225-1 are
negligible and the above expression is valid. For example,
with V
IN
= 3.6V, I
OUT
= 100mA and V
OUT
regulated to 5.3V,
the measured effi ciency is 71.2% which is in close agree-
ment with the theoretical 73.6% calculation.
Effective Open-Loop Output Resistance (R
OL
)
The effective open-loop output resistance (R
OL
) of a charge
pump is an important parameter that describes the strength
of the charge pump. The value of this parameter depends
on many factors including the oscillator frequency (f
OSC
),
value of the fl ying capacitor (C
FLY
), the non-overlap time,
the internal switch resistances (R
S
) and the ESR of the
external capacitors.
Charging Time Estimation
The estimated charging time with equal initial voltages
across the two supercapacitors is given by the equation:
t
CHRG
=
C
OUT
•V
COUT
–V
INI
(
)
I
OUT
where C
OUT
is the series output capacitance, V
COUT
is the
voltage threshold set by the V
SEL
pin, V
INI
is the initial
voltage at the C
OUT
pin and I
OUT
is the output charge
current given by:
I
OUT
=
1800V
R
PROG
When the charging process starts with unequal initial volt-
ages across the supercapacitors, only the capacitor with
the lower voltage level is charged; the other capacitor is
not charged until the voltages equalize. This extends the
charging time slightly. Under the worst-case condition,
whereby one capacitor is fully depleted while the other
remains fully charged due to signifi cant leakage current
mismatch, the charging time is about 1.5 times longer
than normal.
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the LTC3225/
LTC3225-1. If the junction temperature increases above
approximately 150°C, the thermal shutdown circuitry auto-
matically deactivates the output. To reduce the maximum
junction temperature, a good thermal connection to the PC
board is recommended. Connecting the GND pin (Pin 8)
and the Exposed Pad (Pin 11) of the DFN package to a
ground plane under the device on two layers of the PC
board can reduce the thermal resistance of the package
and PC board considerably.
LTC3225/LTC3225-1
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V
IN
Capacitor Selection
The type and value of C
IN
controls the amount of ripple
present at the input pin (V
IN
). To reduce noise and ripple,
it is recommended that low equivalent series resistance
(ESR) multilayer ceramic chip capacitors (MLCCs) be
used for C
IN
. Tantalum and aluminum capacitors are not
recommended because of their high ESR.
The input current to the LTC3225/LTC3225-1 is relatively
constant during both the input charging phase and the
output charging phase but drops to zero during the clock
non-overlap times. Since the non-overlap time is small
(~40ns) these missing “notches” result in only a small
perturbation on the input power supply line. Note that a
higher ESR capacitor, such as a tantalum, results in higher
input noise. Therefore, ceramic capacitors are recom-
mended for their exceptional ESR performance. Further
input noise reduction can be achieved by powering the
LTC3225/LTC3225-1 through a very small series inductor
as shown in Figure 2.
A 10nH inductor will reject the fast current notches,
thereby presenting a nearly constant current load to the
input power supply. For economy, the 10nH inductor can
be fabricated on the PC board with about 1cm (0.4") of
PC board trace.
Flying Capacitor Selection
Warning: Polarized capacitors such as tantalum or alumi-
num should never be used for the fl ying capacitor since
its voltage can reverse upon start-up of the LTC3225/
LTC3225-1. Low ESR ceramic capacitors should always
be used for the fl ying capacitor.
The fl ying capacitor controls the strength of the charge
pump. In order to achieve the rated output current, it is
necessary to use at least 0.6µF of capacitance for the
fl ying capacitor.
The effective capacitance of a ceramic capacitor varies with
temperature and voltage in a manner primarily determined
by its formulation. For example, a capacitor made of X5R
or X7R material retains most of its capacitance from
–40°C to 85°C whereas a Z5U or Y5V type capacitor loses
considerable capacitance over that range. X5R, Z5U and
Y5V capacitors may also have a poor voltage coeffi cient
causing them to lose 60% or more of their capacitance
when the rated voltage is applied. Therefore, when com-
paring different capacitors, it is often more appropriate to
compare the amount of achievable capacitance for a given
case size rather than comparing the specifi ed capacitance
value. For example, over rated voltage and temperature
conditions, a 4.7µF 10V Y5V ceramic capacitor in a 0805
case may not provide any more capacitance than a 1µF 10V
X5R or X7R capacitor available in the same 0805 case. In
fact, over bias and temperature range, the 1µF 10V X5R
or X7R provides more capacitance than the 4.7µF 10V
Y5V capacitor. The capacitor manufacturer’s data sheet
should be consulted to determine what value of capacitor
is needed to ensure minimum capacitance values are met
over operating temperature and bias voltage.
0.1µF
10nH
2.2µF
9
8, 11
3225 F02
LTC3225
LTC3225-1
V
IN
V
IN
GND
Figure 2. 10nH Inductor Used for Input Noise Reduction
APPLICATIONS INFORMATION
P1-P3P4-P6P7-P9P10-P12P13-P14

LTC3225EDDB-1#TRMPBF

Mfr. #:
Buy LTC3225EDDB-1#TRMPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Management Specialized - PMIC 150mA Supercapacitor Charger
Lifecycle:
New from this manufacturer.
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