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AMIS30660CANH2RG

P1-P3P4-P6P7-P9P10-P10
AMIS−30660
http://onsemi.com
4
FUNCTIONAL DESCRIPTION
Operating Modes
The behavior of AMIS−30660 under various conditions is
illustrated in Table 5 below. In case the device is powered,
one of two operating modes can be selected through Pin S.
Table 5. FUNCTIONAL TABLE OF AMIS−30660 (X = DON’T CARE)
VCC Pin TxD Pin S Pin CANH Pin CANL Bus State Pin RxD
4.75 V to 5.25 V 0 0 (or Floating) High Low Dominant 0
4.75 V to 5.25 V X 1 V
CC
/ 2 V
CC
/ 2 Recessive 1
4.75 V to 5.25 V 1 (or Floating) X V
CC
/ 2 V
CC
/ 2 Recessive 1
V
CC
< PORL (Unpowered) X X 0 V < CANH
< V
CC
0 V < CANL <
V
CC
Recessive 1
PORL < V
CC
< 4.75 V > 2 V X 0 V < CANH
< V
CC
0 V < CANL <
V
CC
Recessive 1
High−Speed Mode
If Pin S is pulled low (or left floating), the transceiver is
in its high−speed mode and is able to communicate via the
bus lines. The signals are transmitted and received to the
CAN controller via the Pins TxD and RxD. The slopes on the
bus line outputs are optimized to give extremely low
electromagnetic emissions.
Silent Mode
In silent mode, the transmitter is disabled. All other IC
functions continue to operate. The silent mode is selected by
connecting Pin S to V
CC
and can be used to prevent network
communication from being blocked, due to a CAN
controller which is out of control.
Overtemperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 160°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC is reduced. All other
IC functions continue to operate. The transmitter off−state
resets when Pin TxD goes high. The thermal protection
circuit is particularly necessary when a bus line
short−circuits.
TxD Dominant Time−out Function
A TxD dominant time−out timer circuit prevents the bus
lines from being driven to a permanent dominant state
(blocking all network communication) if Pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on Pin TxD exceeds the
internal timer value t
dom
, the transmitter is disabled, driving
the bus into a recessive state. The timer is reset by a positive
edge on Pin TxD.
Fail−Safe Features
A current−limiting circuit protects the transmitter output
stage from damage caused by an accidental short−circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The Pins CANH and CANL are protected from
automotive electrical transients (according to “ISO 7637”;
see Figure 3). Pin TxD is pulled high internally should the
input become disconnected.
AMIS−30660
http://onsemi.com
5
ELECTRICAL CHARACTERISTICS
Definitions
All voltages are referenced to GND (Pin 2). Positive
currents flow into the IC. Sinking current means the current
is flowing into the pin; sourcing current means the current
is flowing out of the pin.
Table 6. DC AND TIMING CHARACTERISTICS
(V
CC
= 4.75 V to 5.25 V; T
junc
= −40°C to +150°C; R
LT
= 60 W unless specified otherwise.)
Symbol
Parameter Conditions Min Typ Max Unit
SUPPLY (Pin V
CC
)
I
CC
Supply Current Dominant; V
TXD
= 0 V
Recessive; V
TXD
= V
CC
25
2
45
4
65
8
mA
I
CCS
Supply Current in silent mode V
S
= V
CC
2 4 8 mA
TRANSMITTER DATA INPUT (Pin TxD)
V
IH
High−level input voltage Output recessive 2.0 − V
CC
+0.3 V
V
IL
Low−level input voltage Output dominant −0.3 − +0.8 V
I
IH
High−level input current V
TxD
= V
CC
−1 0 +1
mA
I
IL
Low−level input current V
TxD
= 0 V −75 −200 −350
mA
C
i
Input capacitance Not tested − 5 10 pF
MODE SELECT (Pin S)
V
IH
High−level input voltage Silent mode 2.0 − V
CC
+0.3 V
V
IL
Low−level input voltage High−speed mode −0.3 − +0.8 V
I
IH
High−level input current V
S
= 2 V 20 30 50
mA
I
IL
Low−level input current V
S
= 0.8 V 15 30 45
mA
RECEIVER DATA OUTPUT (Pin RxD)
V
OH
High−level output voltage I
RXD
= − 10 mA 0.6 x
V
CC
0.75 x
V
CC
V
V
OL
Low−level output voltage I
RXD
= 6 mA 0.25 0.45 V
REFERENCE VOLTAGE OUTPUT (Pin V
ref
)
V
REF
Reference output voltage
−50 mA < I
VREF
< +50 mA
0.45 x
V
CC
0.50 x
V
CC
0.55 x
V
CC
V
V
REF_CM
Reference output voltage for full common
mode range
−35 V <V
CANH
< +35V;
−35 V <V
CANL
< +35V
0.40 x
V
CC
0.50 x
V
CC
0.60 x
V
CC
V
BUS LINES (Pins CANH and CANL)
V
o(reces)(CANH)
Recessive bus voltage at pin CANH V
TxD
= V
CC
; no load 2.0 2.5 3.0 V
V
o(reces)(CANL)
Recessive bus voltage at pin CANL V
TxD
= V
CC
; no load 2.0 2.5 3.0 V
I
o(reces)
(CANH)
Recessive output current at pin CANH −35 V < V
CANH
< +35 V;
0 V <V
CC
< 5.25 V
−2.5 − +2.5 mA
I
o(reces)
(CANL)
Recessive output current at pin CANL −35 V < V
CANL
< +35 V;
0V <V
CC
< 5.25 V
−2.5 − +2.5 mA
V
o(dom)
(CANH)
Dominant output voltage at pin CANH V
TxD
= 0 V 3.0 3.6 4.25 V
V
o(dom)
(CANL)
Dominant output voltage at pin CANL V
TxD
= 0 V 0. 5 1.4 1.75 V
V
o(dif)
(bus)
Differential bus output voltage
(V
CANH
− V
CANL
)
V
TxD
= 0 V; dominant;
42.5 W < R
LT
< 60 W
1.5 2.25 3.0 V
V
TxD
= V
CC
; recessive;
No load
−120 0 +50 mV
I
o(sc)
(CANH)
Short circuit output current at pin CANH V
CANH
= 0 V; V
TxD
= 0 V −45 −70 −95 mA
I
o(sc)
(CANL)
Short circuit output current at pin CANL V
CANL
= 36V; V
TxD
= 0V 45 70 120 mA
AMIS−30660
http://onsemi.com
6
Table 6. DC AND TIMING CHARACTERISTICS
(V
CC
= 4.75 V to 5.25 V; T
junc
= −40°C to +150°C; R
LT
= 60 W unless specified otherwise.)
Symbol UnitMaxTypMinConditionsParameter
BUS LINES (Pins CANH and CANL)
V
i(dif)(th)
Differential receiver threshold voltage −5 V < V
CANL
< +10 V;
−5 V < V
CANH
< +10 V;
See Figure 4
0.5 0.7 0.9 V
V
ihcm(dif)
(th)
Differential receiver threshold voltage for
high common−mode
−35 V < V
CANL
< +35 V;
−35 V < V
CANH
< +35V;
See Figure 4
0.25 0.7 1.05 V
V
i(dif)
(hys)
Differential receiver input voltage hyster-
esis
−5 V < V
CANL
< +10 V;
−5 V < V
CANH
< +10 V;
See Figure 4
50 70 100 mV
R
i(cm)(CANH)
Common−mode input resistance at pin
CANH
15 25 37
KW
R
i(cm)
(CANL)
Common−mode input resistance at pin
CANL
15 25 37
KW
R
i(cm)(m)
Matching between pin CANH and pin
CANL common−mode input resistance
V
CANH
= V
CANL
−3 0 +3 %
R
i(dif)
Differential input resistance 25 50 75
KW
C
i(CANH)
Input capacitance at pin CANH V
TxD
= V
CC
; not tested 7.5 20 pF
C
i(CANL)
Input capacitance at pin CANL V
TxD
= V
CC
; not tested 7.5 20 pF
C
i(dif)
Differential input capacitance V
TxD
= V
CC
; not tested 3.75 10 pF
I
LI(CANH)
Input leakage current at pin CANH V
CC
= 0 V; V
CANH
= 5V 10 170 250
mA
I
LI(CANL)
Input leakage current at pin CANL V
CC
= 0 V; V
CANL
= 5V 10 170 250
mA
V
CM−peak
Common−mode peak during transition
from dom → rec or rec → dom
See Figures 7 and 8 −500 500 mV
V
CM−step
Difference in common−mode between
dominant and recessive state
See Figures 7 and 8 −150 150 mV
POWER−ON−RESET (POR)
PORL
POR level CANH, CANL, V
ref
in tri−
state below POR level
2.2 3.5 4.5 V
THERMAL SHUTDOWN
T
j(sd)
Shutdown junction temperature 150 160 180 °C
TIMING CHARACTERISTICS (see Figures 5 and 6)
t
d(TxD−BUSon)
Delay TxD to bus active V
s
= 0 V 40 85 130 ns
t
d(TxD−BUSoff)
Delay TxD to bus inactive V
s
= 0 V 30 60 105 ns
t
d(BUSon−RxD)
Delay bus active to RxD V
s
= 0 V 25 55 105 ns
t
d(BUSoff−RxD)
Delay bus inactive to RxD V
s
= 0 V 65 100 135 ns
t
pd(rec−dom)
Propagation delay TxD to RxD from
recessive to dominant
V
s
= 0 V 70 245 ns
t
d(dom−rec)
Propagation delay TxD to RxD from
dominant to recessive
V
s
= 0 V 100 245 ns
t
dom(TxD)
TxD dominant time for time out V
TxD
= 0 V 250 450 750
ms
P1-P3P4-P6P7-P9P10-P10

AMIS30660CANH2RG

Mfr. #:
Buy AMIS30660CANH2RG
Manufacturer:
ON Semiconductor
Description:
CAN Interface IC HS CAN TRANSC. (5V)
Lifecycle:
New from this manufacturer.
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