ISL6730A, ISL6730B, ISL6730C, ISL6730D
13
FN8258.1
August 8, 2013
Table 3 shows the design parameters.
BOOST INDUCTOR SELECTION
First, calculate the maximum input RMS current, I
INMAX.
Where η is the converter efficiency at V
RMSmin
. PF is the power
factor at V
RMSmin.
Assuming the current is sinusoidal and the peak to peak ripple at
line is 40%.
The boost inductor, L
BST
, is given by the following equation:
The peak current of the inductor is the sum of the average peak
inductor current and half of the peak to peak ripple current.
Select and design the boost inductor as given by Equation 11.
The ISL6730A, ISL6730B, ISL6730C, ISL6730D provides peak
current limit function that can prevent the boost inductor
saturation. Assuming 25% margin is given to the OCP threshold,
select and design the boost inductor with saturation current
given by Equation 11 with 25% more.
INPUT RECTIFIER
The maximum average input current is calculated:
Select the bridge diode using Equation 15 and sufficient reverse
breakdown voltage. Assuming the forward voltage, V
F,BR
, is 1V
across each rectifier diode. The power loss of the rectifier bridge
can be calculated:
INPUT CAPACITOR SELECTION
Refer to Table 2 for the recommended input filter capacitor value.
This is the recommended capacitor used after the diode bridge.
For better power factor, less capacitance can be used. To lower
the input filter inductor size, more capacitance can be used.
Two 0.47µF capacitors in parallel are used for C
F1
.
BOOST DIODE SELECTION
The boost diode loss is determined by the diode forward voltage
drop, V
F
and the output average current. The maximum output
current is:
The forward power loss on the diode is:
The IDD03E60 part is selected.
The reverse recovery loss on the diode can be calculated. The
Q
RR
is found from the diode datasheet. Q
RR
= 220nC when
I
F
=3.5A.
The reverse recover loss on the diode can be estimated:
The total power loss on the diode is:
MOSFET POWER DISSIPATION
The power dissipation on the MOSFET is from two different types
of losses; the condition loss and the switching loss.
For the MOSFET, the worst case is at minimum line input voltage.
First, the drain to source RMS current is calculated:
TABLE 3. CONVERTER DESIGN PARAMETERS
PARAMETER CONDITIONS MIN TYP MAX UNIT
VLINE 85 115 265 VAC
FLINE 47 63 Hz
P
OMAX
Maximum Output Power 300 W
T
HOLD
Hold Up Time 20 ms
Efficiency VLINE = 115VAC 92 %
I
INMAX
P
OMAX
η V
RMSmin
-----------------------------------
=
(EQ. 7
I
INMAX
300W
0.92 85V
----------------------------
3.84A==
(EQ. 8)
L
BST
2V
RMSmin
0.4 F
sw
2 I
INMAX
--------------------------------------------------------------- -
1
2V
RMSmin
V
OUT
---------------------------------------
⎝⎠
⎜⎟
⎛⎞
(EQ. 9)
L
BST
85V
0.4 62kHz 3.84 A
------------------------------------------------------
1
285V
390V
------------------------
⎝⎠
⎛⎞
617μH=
(EQ. 10)
I
LPeak
2I
INMAX
1
0.4
2
--------
+
⎝⎠
⎛⎞
=
(EQ. 11)
I
LPeak
23.88A 1
0.4
2
--------
+
⎝⎠
⎛⎞
6.5A==
(EQ. 12)
I
INAVE max()
22 I
INMAX
π
------------------------------------------
=
(EQ. 13)
I
INAVE max()
22 3.88A
π
--------------------------------------
3.5A==
(EQ. 14)
P
BR
2V
FBR,
I
INAVE MAX()
=
(EQ. 15)
P
BR
21V 3.5A 7W==
(EQ. 16)
C
F1
300W
0.33
100
-----------
0.99μF==
(EQ. 17)
I
OUT max()
P
OMAX
V
OUT
--------------------
=
(EQ. 18)
I
OUT max()
300W
390V
----------------
0.77A==
(EQ. 19)
P
FD
I
OUT max()
V
F
=
(EQ. 20)
P
FD
0.77A 1.85V 1.42W==
(EQ. 21)
P
RRD
1
4
---
Q
RR
V
OUT
F
sw
=
(EQ. 22)
P
RRD
1
4
---
220nC 390V 62kHz 1.33W==
(EQ. 23)
P
D
P
FD
P
RRD
+ 1.42 1.35+()W2.75W== =
(EQ. 24)
I
DS max()
I
INMAX
1
82
3π
-----------
V
RMSmin
V
OUT
--------------------------
=
(EQ. 25)
I
DS max()
3.88A 1
82
3π
-----------
85V
390V
--------------
3.3A==
(EQ. 26)
ISL6730A, ISL6730B, ISL6730C, ISL6730D
14
FN8258.1
August 8, 2013
The MOSFET, SPP20N60C3 is selected.
The switching loss of the MOSFET consists of three parts: the
turn-on loss, the turn-off loss and the diode reverse recovery loss.
From the MOSFET datasheet, the typical switching losses curves
are provided.
When R
G
= 3.6Ω, I
D
= 6A, E
ON
= 0.015mJ, E
OFF
= 0.007mJ.
The switching loss due to transition is calculated:
The diode reverse recovery incurs additional power loss on the
MOSFET. This loss can be estimated as:
This loss is also related the di/dt during the MOSFET turn-on. The
di/dt can be found out from the MOSFET datasheet. At
R
G
= 3.6Ω, the turn-on di/dt is 4000A/µs. From the Typical
Reverse Recovery Charge curve at T
J
= +125°C, the
Q
RR
= 220nC when I
F
= 3.5A.
THE TOTAL LOSS ON THE MOSFET
OUTPUT CAPACITOR SELECTION
The output capacitor, C
OUT
, is required to hold the output above
300V during one line cycle. For capacitors with 20% tolerance,
the tolerance should be taken into consideration. Thus, the
output capacitance should be greater than:
Calculate the ripple RMS current through the capacitor:
Select the proper capacitor according to the hold time and ripple
RMS current requirement. The actual capacitance is 270µF.
It is important to make sure the output peak-to-peak ripple is
less than the minimum OVP threshold as specified in the
“Electrical Specifications” table on page 6. The ESR at 2 times of
the line frequency of the capacitor is found in the capacitor
datasheet. The ESR of the output capacitor is 770mΩ at 100Hz.
The minimum OVP threshold is 103% of the nominal output
value. The maximum output peak to peak ripple should be less
than 6% of the nominal value, which is 23.4V
P-P
.
CURRENT SENSING RESISTORS
Please refer to Equation 4 for calculation of the current sensing
resistor R
CS
.
While a large R
CS
renders better current sensing accuracy, larger
R
CS
also incurs higher power dissipation. Select R
CS
from
available standard value resistors to determine the sense
resistor.
The maximum power dissipation on the R
CS
occurs at low line
and full load condition. The maximum power dissipation is
calculated:
The resistor, R
SEN
sets the overcurrent protection limit. From
Equation 3, R
SEN
should be greater than:
Where |x| stands for the ABS(x) function.
Select R
SEN
from available standard value resistors, the selected
R
SEN
is 3.16kΩ.
CURRENT LOOP COMPENSATION
The input current shaping is achieved by comparing the sensed
current signal to the sensed input voltage signal. The current
error amplifier (Gmi), together with the current compensation
network, adjusts the duty cycle so that the inductor current
traces the sensed rectified voltage. Thus, unity power factor is
achieved.
The compensation network consists of the Trans-Conductance
error amplifier (Gmi) and the impedance network (Z
ICOMP).
The
goal of the compensation network is to provide a closed loop
transfer function with the sufficient 0dB crossing frequency
(f
0dB
) and adequate phase margin. Phase margin is the
difference between the open loop phase at f
0dB
and 180°. The
following equations relate the compensation network’s poles,
zeros and gain to the components (R
ic
, C
ic
and C
ip
) in Figure 15.
P
COND
I
DS max()
2
R
DS on()
=
(EQ. 27)
P
COND
3.3A
2
0.3Ω 3.27W==
(EQ. 28)
P
SW
E
ON
E
OFF
+()F
sw
=
(EQ. 29)
P
SW
0.015mJ 0.007mJ+()62kHz 1.36W==
(EQ. 30)
P
RR
Q
RR
V
OUT
F
sw
=
(EQ. 31)
P
RR
220nC 390V 62 kHz 5.32W==
(EQ. 32)
P
COND
P
SW
P+
RR
+ 3.27W 1.36W 5.32W++ 9.95W==
(EQ. 33)
C
OUT
2T
HOLD
P⋅⋅
OMAX
V
OUT
2
V
HOLD
2
----------------------------------------------------
1
10.2
-----------------
(EQ. 34)
C
OUT
2 20ms 300W⋅⋅
390()
2
300V()
2
----------------------------------------------
1.25 242μF=
(EQ. 35)
I
CORMS max()
I
OUT max()
82
3π
-----------
V
OUT
V
RMSmin
--------------------------
1=
(EQ. 36)
I
CORMS max()
0.77A
82
3π
-----------
390V
85V
--------------
1 1.635A==
(EQ. 37)
V
Opp
I
OUT max()
4πf
line
C
OUT
ESR⋅⋅()
2
1+
4πf
line
()C
OUT
0.8⋅⋅
-------------------------------------------------------------------------------
=
(EQ. 38)
V
Opp
0.77A
4π 50Hz 270μF0.77Ω⋅⋅ ()
2
1+
4π 50Hz()270μF0.8⋅⋅
--------------------------------------------------------------------------------------------
6.6V==
(EQ. 39)
R
CS
120mV 265V 0.92⋅⋅
2300W
-------------------------------------------------------
0.069Ω=
(EQ. 40)
R
CS
0.068Ω=
(EQ. 41)
P
RCSMAX
I
INMAX
2
R
CS
=
(EQ. 42)
P
RCSMAX
3.88A
2
0.068Ω 1.023W==
(EQ. 43)
R
SEN
R
CS
I
LPeak
10.25+()
20.5I
OC
--------------------------------------------------------------------
(EQ. 44)
R
SEN
0.068Ω 6.6A 1.25
290μA
--------------------------------------------------------
3.117kΩ=
(EQ. 45)
ISL6730A, ISL6730B, ISL6730C, ISL6730D
15
FN8258.1
August 8, 2013
Use the following guidelines for locating the poles and zeros of
the compensation network.
The cross over frequency of the current loop should be set
between 2kHz to 100kHz. At cross over frequency, the transfer
function from duty cycle to inductor current is well approximated
by Equation 48:
It is recommended to set the cross over frequency from 1/10 to
1/6 of the switching frequency with phase margin of 60°. A high
frequency pole is set at 1/2 of the switching frequency for ripple
filtering. In this example, we set the cross over, F
C
at 1/6 of the
switching frequency.
Where F
C
= F
S
/6 = 10.3kHz, Φ
M
is the phase margin, which is
60°. F
P
= F
S
/2 = 31kHz.
Thus, the current loop compensation zero is:
The total compensation capacitance is calculated:
The value of the noise filtering capacitor is:
The value of C
ic
is:
The value of R
ic
is:
Select the R
C
value from the standard value, we have:
R
ic
= 4.02kΩ, C
ic
= 18nF, C
ip
= 1.2nF. Figure 17 shows the actual
bode plot of current loop gain.
FIGURE 15. INDUCTOR CURRENT SENSING SCHEME
Q
1
C
OUT
V
OUT
L
C
F1
R
CS
ISEN
R
SEN
CURRENT
MIRROR
2:1
I
CS
ICOMP
I
REF
Gmi
R
ic
C
ic
R
IS
C
ip
V
I
80
40
20
0
-20
-40
-60
-80
-100
F
P
100k10k1k100
FROM DUTY TO
F
Z
COMPENSATION
GAIN (dB)
FREQUENCY (Hz)
GAIN
MODULATOR GAIN
CURRENT GAIN
OPEN LOOP
GAIN
FIGURE 16. ASYMPTOTIC BODE PLOT OF CURRENT LOOP GAIN
INDUCTOR CURRENT
F
Z
1
2π R
ic
C
ic
----------------------------------- -
=
(EQ. 46)
F
P
1
2π R
ic
C
ip
C
ic
C
ip
C
ic
+
------------------------
---------------------------------------------------
=
(EQ. 47)
G
id
s()
V
OUT
L
BST
s
----------------------
=
(EQ. 48)
F
Z
F
C
F
C
F
P
-------
⎝⎠
⎜⎟
⎛⎞
atan Φ
M
+
⎝⎠
⎜⎟
⎛⎞
tan
--------------------------------------------------------
=
(EQ. 49)
F
Z
62KHz()6
2
6
---
⎝⎠
⎛⎞
atan 60deg+
⎝⎠
⎛⎞
tan
------------------------------------------------------------ -
= 2.12kHz=
(EQ. 50)
C
ip
C
ic
V
OUT
L
BST
2πf
c
()
2
---------------------------------------
A
iDC
V
m
-------------
R
CS
R
SEN
----------------
⋅⋅
⎝⎠
⎜⎟
⎛⎞
1f
c
f
z
()
2
+
1f
c
f
p
()
2
+
------------------------------ -
⎝⎠
⎜⎟
⎜⎟
⎛⎞
=+
(EQ. 51)
C
ip
C
ic
19.8()nF=+
(EQ. 52)
C
ip
C
ip
C
iC
+()
f
z
f
p
----
=
(EQ. 53)
C
ip
14.9nF
2.12kHz
31kHz
-----------------------
1.35nF==
(EQ. 54)
C
ic
19.8nF 1.35nF 18.4nF==
(EQ. 55)
R
ic
1
2π 2.12kHz 18.4nF⋅⋅
-----------------------------------------------------------
4.11kΩ==
(EQ. 56)

ISL6730DFUZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Power Factor Correction - PFC PFC Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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