XC2C128 CoolRunner-II CPLD
10 www.xilinx.com DS093 (v3.2) March 8, 2007
Product Specification
R
Typical I/V Output Curves
The I/V curve illustrates the nominal amount of current that an I/O can source/sink at different voltage levels.
11
Figure 4: Typical I/V Curves for XC2C128
VO (Output Volts)
XC128_IV_all_050703
IO (Output Current mA)
0
0
40
10
50
20
30
60
3.02.52.01.51.0.5
3
.5
3.3V
1.5V
1.8V
2.5V
Iol
Pin Descriptions
Function
Block
Macro-
cell VQ100 CP132 TQ144
I/O
Bank
1 1 13 G1 17 2
12-F1162
1 3 12 F2 15 2
1411F3142
1 5 10 E1 13 2
169E2122
17----
18----
19----
110----
1118E3112
1127D1102
1136D292
114-C172
1(GTS1) 15 4 C2 6 2
1(GTS0) 16 3 C3 5 2
21-G2191
2 2 14 G3 21 1
2 3 15 H1 22 1
2 4 16 H2 23 1
2 5 17 H3 24 1
2 6 18 J1 25 1
27----
28----
29----
210----
21119J2261
212-K1281
2(GCK0) 13 22 K3 30 1
2(GCK1) 14 23 L2 32 1
2(CDRST) 15 24 M2 35 1
2(GCK2) 16 27 N2 38 1
Pin Descriptions (Continued)
Function
Block
Macro-
cell VQ100 CP132 TQ144
I/O
Bank
XC2C128 CoolRunner-II CPLD
DS093 (v3.2) March 8, 2007 www.xilinx.com 11
Product Specification
R
31-B142
3(GTS3) 2 2 B2 3 2
3(GTS2) 3 1 A1 2 2
3(GSR) 4 99 A3 143 2
3597B41402
3696A41382
3795C51362
38----
39----
310----
31194B51342
312 A51332
31393C61322
31492B61312
31591A61302
31690C71292
4(DGE) 1 28 P2 39 1
42-M3401
43-N3411
4 4 29 P3 43 1
4 5 30 M4 45 1
4 6 32 M5 49 1
4 7 33 N5 50 1
48----
49----
410----
41134P5511
41235M6521
41336N6531
41437P6541
41539N7561
41640M7571
Pin Descriptions (Continued)
Function
Block
Macro-
cell VQ100 CP132 TQ144
I/O
Bank
5165G13942
5266G12952
5367F14962
54-F13972
5568F12982
56-E131002
5 7 70 E12 101 2
58----
59----
510----
51171D141022
51272D131032
51373D121042
51474C141052
51576B131102
5 16 - A13 111 2
6164H12921
6263H13911
6361J13881
6460J12871
6559K14861
6658K13851
67----
68----
69----
610----
6 11 - L14 83 1
6 12 56 L13 82 1
6 13 - L12 81 1
6 14 55 M14 80 1
615-M13791
6 16 54 M12 78 1
Pin Descriptions (Continued)
Function
Block
Macro-
cell VQ100 CP132 TQ144
I/O
Bank
XC2C128 CoolRunner-II CPLD
12 www.xilinx.com DS093 (v3.2) March 8, 2007
Product Specification
R
7 1 77 C12 112 2
7 2 78 B12 113 2
73-A121152
7 4 79 C11 116 2
7 5 80 B11 117 2
7 6 81 A11 118 2
77-C101192
78----
79----
710----
71182A101202
712-C91212
71385A81242
71486B81252
71587C81262
71689B71282
Pin Descriptions (Continued)
Function
Block
Macro-
cell VQ100 CP132 TQ144
I/O
Bank
8 1 - N14 77 1
8253N13761
8352P14741
8450P12711
85-M11701
8649N11691
87----
88----
89----
810----
811-P11681
8 12 46 P10 64 1
81344P9611
81443M8601
81542N8591
81641P8581
Notes:
1. GTS = global output enable, GSR = global reset/set, GCK =
global clock, CDRST = clock divide reset, DGE = DataGATE
enable.
2. GCK, GSR, and GTS pins can also be used for general
purpose I/O.
Pin Descriptions (Continued)
Function
Block
Macro-
cell VQ100 CP132 TQ144
I/O
Bank

XC2C128-7CPG132C

Mfr. #:
Manufacturer:
Xilinx
Description:
CPLD - Complex Programmable Logic Devices XC2C128-7CPG132C
Lifecycle:
New from this manufacturer.
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