XC2C128 CoolRunner-II CPLD
16 www.xilinx.com DS093 (v3.2) March 8, 2007
Product Specification
R
Figure 7: CP132 Chip Scale Package
CP132
Bottom View
P
N
M
L
K
J
H
G
F
E
D
C
B
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VCC
VCCIO1 VCCIO1
GNDI/O I/O I/O I/O I/O I/O I/O I/O I/O
I/O(5)
I/O
I/O
VAUX I/O I/O
I/O
I/O
I/O
I/O I/O I/O
I/O
I/O
I/O
I/O I/O VCCIO1
I/O
I/O
I/O
I/O I/O GND
I/O
I/O
I/O
I/O I/O GND
I/O
I/O
I/O
VCCIO1 I/O GND
I/O
I/O
I/O
I/O(2) VCC I/O
GND
NC
I/O
NC I/O I/O
I/O(2)
I/O(1)
VCCIO2 I/O
I/OI/O(3) I/O I/O I/O GND I/O I/O I/O VCCIO2
VCC
I/O
I/O I/O
I/OGND I/O I/O I/O TDO NC I/O I/O GND
I/O(1)
I/O
I/O NC
VCCIO2I/O(1) I/O I/O I/O I/O I/O I/O I/O I/O
I/O(1)
NC
I/O I/O
I/OI/O I/O I/O I/O TDI TCK I/O I/O I/O
I/O(4)
GND
I/O I/O
NCI/O I/O I/O I/O GND TMS I/O GND I/O
I/O(2)
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(4) - Clock Divide Reset
(5) - DataGATE Enable
XC2C128 CoolRunner-II CPLD
DS093 (v3.2) March 8, 2007 www.xilinx.com 17
Product Specification
R
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm
. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Figure 8: TQ144 Thin Quad Flat Pack
V
CC
I/O
(1)
I/O
(1)
I/O
I/O
(1)
I/O
(1)
I/O
V
AUX
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
I/O
NC
I/O
I/O
I/O
I/O
I/O
I/O
V
CCIO1
I/O
GND
I/O
(2)
NC
I/O
(2)
NC
NC
I/O
(4)
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
TQ144
Top View
V
CC
I/O
(2)
I/O
(5)
I/O
I/O
NC
I/O
NC
I/O
NC
GND
NC
I/O
I/O
I/O
I/O
I/O
I/O
V
CCIO1
I/O
I/O
I/O
I/O
I/O
I/O
GND
TDI
I/O
TMS
NC
TCK
I/O
I/O
I/O
I/O
GND
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
GND
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
V
CCIO1
I/O
I/O
GND
GND
I/O
I/O
I/O
I/O
V
CC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
I/O
V
CCIO1
GND
I/O
(3)
NC
V
CCIO2
I/O
NC
I/O
NC
I/O
NC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
V
CCIO2
I/O
I/O
I/O
GND
TDO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
I/O
I/O
I/O
I/O
V
CCIO2
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(4) - Clock Divide Reset
(5) - DataGATE Enable
XC2C128 CoolRunner-II CPLD
18 www.xilinx.com DS093 (v3.2) March 8, 2007
Product Specification
R
Additional Information
Additional information is available for the following CoolRunner-II topics:
XAPP784: Bulletproof CPLD Design Practices
XAPP375: Timing Model
XAPP376: Logic Engine
XAPP378: Advanced Features
XAPP382: I/O Characteristics
XAPP389: Powering CoolRunner-II
XAPP399: Assigning VREF Pins
To access these and all application notes with their associ-
ated reference designs, click the following link and scroll
down the page until you find the document you want:
CoolRunner-II Data Sheets and Application Notes
Device Packages
Revision History
The following table shows the revision history for this document.
Date Version Revision
10/01/02 1.0 Initial Xilinx release.
5/19/03 2.0 Added bin 6, 7 characterization data.
8/25/03 2.1 Edit Package diagram, other minor formatting edits.
01/26/04 2.2 Update links.
03/01/04 2.3 Fixed cropping on Figure 6.
7/30/04 2.4 Added Pb-free documentation.
10/01/04 2.5 Add Asynchronous Preset/Reset Pulse Width specification to AC Electrical Characteristics.
01/30/05 2.6 Change to I
CCSB
MAX for Commercial and Industrial.
03/07/05 2.7 Delete -4 speed grade. Modifications to Table 1, IOSTANDARDs.
04/21/05 2.8 Recharacterization of AC Specifications
06/28/05 2.9 Move to Product Specification.
03/20/06 3.0 Add Warranty Disclaimer. Add note to Pin Descriptions that
GCK, GSR, and GTS pins can also
be used for general purpose I/O. Replaced Figure 3 with a higher resolution graphic.
02/15/07 3.1 Corrections to timing parameters t
F
, t
CT
, t
DIN
, t
GTS
, t
OEM
and f
TOGGLE
for -6 speed grade.
Corrections to t
DIN
, t
GCK
, t
EN
, t
SUI
, t
ECSU
, t
F
, t
OEM
, F
EXT1
, and F
EXT2
for the -7 speed grade.
Values now match the software. There were no changes to silicon or characterization.
Change to V
IH
specification for 2.5V and 1.8V LVCMOS.
03/08/07 3.2 Fixed typo in note for V
IL
for LVCMOS18; removed note for V
IL
for LVCMOS33.

XC2C128-7CPG132C

Mfr. #:
Manufacturer:
Xilinx
Description:
CPLD - Complex Programmable Logic Devices XC2C128-7CPG132C
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union