Si824x
4 Preliminary Rev. 0.3
1. Top-Level Block Diagram
Figure 1. Si8241/44 Single-Input High-Side/Low-Side Isolated Drivers
Si8241/44
UVLO
UVLO
GNDI
VDDI
PWM
VDDA
VOA
GNDA
VOB
VDDI
VDDI
ISOLATION
VDDI
VDDB
GNDB
DISABLE
ISOLATION
UVLO
DT CONTROL
&
OVERLAP
PROTECTION
DT
LPWM
LPWM
Si824x
Preliminary Rev. 0.3 5
2. Electrical Specifications
Table 1. Electrical Characteristics
1
4.5 V < VDDI < 5.5 V, VDDA = VDDB = 12 V or 15 V. TA = –40 to +125 °C. Typical specs at 25 °C
Parameter Symbol Test Conditions Min Typ Max Units
DC Specifications
Input-Side Power Supply
Voltage
VDDI 4.5 5.5 V
Driver Supply Voltage
VDDA, VDDB
Voltage between VDDA and
GNDA, and VDDB and GNDB
(See “6. Ordering Guide” )
6.5 24 V
Input Supply Quiescent
Current
IDDI(Q) Si8241/44 2 3 mA
Output Supply Quiescent
Current
IDDA(Q),
IDDB(Q)
Current per channel 3.0 mA
Input Supply Active Current
IDDI PWM freq = 500 kHz 2.5 mA
Output Supply Active Current
IDDO PWM freq = 500 kHz 3.6 mA
Input Pin Leakage Current
IPWM –10 +10 µA dc
Input Pin Leakage Current
IDISABLE –10 +10 µA dc
Logic High Input Threshold
VIH 2.0 V
Logic Low Input Threshold
VIL 0.8 V
Input Hysteresis
VI
HYST
400 450 mV
Logic High Output Voltage
VOAH,
VOBH
IOA, IOB = –1 mA
(VDDA
/VDDB)
— 0.04
——V
Logic Low Output Voltage
VOAL, VOBL IOA, IOB = 1 mA 0.04 V
Output Short-Circuit Pulsed
Sink Current
IOA(SCL),
IOB(SCL)
Si8241, Figure 2 0.5 A
Si8244, Figure 2 4.0 A
Output Short-Circuit Pulsed
Source Current
IOA(SCH),
IOB(SCH)
Si8241, Figure 3 0.25 A
Si8244, Figure 3 2.0 A
Output Sink Resistance
R
ON(SINK)
Si8241 5.0
Si8244 1.0
Output Source Resistance
R
ON(SOURCE)
Si8241 15
Si8244 2.7
Notes:
1. VDDA = VDDB = 12 V for 8 V UVLO and 10 V UVLO devices.
2. The largest RDT resistor that can be used is 220 k.
Si824x
6 Preliminary Rev. 0.3
VDDI Undervoltage Threshold
VDDI
UV+
VDDI rising 3.60 4.0 4.45 V
VDDI Undervoltage Threshold
VDDI
UV–
VDDI falling 3.30 3.70 4.15 V
VDDI Lockout Hysteresis
VDDI
HYS
—250mV
VDDA, VDDB Undervoltage
Threshold
VDDA
UV+
,
VDDB
UV+
VDDA, VDDB rising
8V Threshold
See Figure 35 on page 22. 7.50 8.60 9.40 V
10 V Threshold
See Figure 36 on page 22. 9.60 11.1 12.2 V
VDDA, VDDB Undervoltage
Threshold
VDDA
UV–
,
VDDB
UV–
VDDA, VDDB falling
8V Threshold
See Figure 35 on page 22. 7.20 8.10 8.70 V
10 V Threshold
See Figure 36 on page 22. 9.40 10.1 10.9 V
VDDA, VDDB
Lockout Hysteresis
VDDA
HYS
,
VDDB
HYS
UVLO voltage = 8 V 600 mV
VDDA, VDDB
Lockout Hysteresis
VDDA
HYS
,
VDDB
HYS
UVLO voltage = 10 V 1000 mV
AC Specifications
Minimum Pulse Width 10 ns
Propagation Delay
t
PHL
, t
PLH
CL = 1 nF 25 60 ns
Pulse Width Distortion
|t
PLH
-
t
PHL
|
PWD 1.0
5.60 ns
Programmed Dead Time
2
DT See Figures 37 and 38 0.4 1000 ns
Output Rise and Fall Time
t
R
,t
F
C
L
= 1 nF (Si8241) 20
ns
C
L
= 1 nF (Si8244) 12
ns
Shutdown Time from
Disable True
t
SD
——60
ns
Restart Time from
Disable False
t
RESTART
——60
ns
Device Start-up Time
t
START
Time from VDD_ = VDD_UV+
to VOA, VOB = VIA, VIB
—57µs
Common Mode
Transient Immunity
CMTI
VIA, VIB, PWM = VDDI or 0 V
V
CM
= 1500 V (see Figure 4)
25 45 kV/µs
Table 1. Electrical Characteristics
1
(Continued)
4.5 V < VDDI < 5.5 V, VDDA = VDDB = 12 V or 15 V. TA = –40 to +125 °C. Typical specs at 25 °C
Parameter Symbol Test Conditions Min Typ Max Units
Notes:
1. VDDA = VDDB = 12 V for 8 V UVLO and 10 V UVLO devices.
2. The largest RDT resistor that can be used is 220 k.

SI8244CB-D-IS1

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Gate Drivers 2.5kV 4A Class D Audio Driver, 10V UVLO PWM input
Lifecycle:
New from this manufacturer.
Delivery:
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