© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 11
1 Publication Order Number:
3.3 V Zero Delay
The NB2305A is a versatile, 3.3 V zero delay buffer designed to
distribute high−speed clocks. It accepts one reference input and drives
out five low−skew clocks. It is available in a 8 pin package.
The −1H version of the NB2305A operates at up to 133 MHz, and
has higher drive than the −1 devices. All parts have on−chip PLL’s that
lock to an input clock on the REF pin. The PLL feedback is on−chip
and is obtained from the CLKOUT pad.
Multiple NB2305A devices can accept the same input clock and
distribute it. In this case the skew between the outputs of the two
devices is guaranteed to be less than 700 ps.
All outputs have less than 200 ps of cycle−to−cycle jitter. The input
and output propagation delay is guaranteed to be less than 350 ps, and
the output to output skew is guaranteed to be less than 250 ps.
The NB2305A is available in two different configurations, as shown
in the ordering information table. The NB2305AI is the base part. The
NB2305AI1H is the high drive version of the −1 and its rise and fall
times are much faster than −1 part.
• 15 MHz to 133 MHz Operating Range, Compatible with CPU and
PCI Bus Frequencies
• Zero Input − Output Propagation Delay
• Multiple Low−Skew Outputs
• Output−Output Skew Less than 250 ps
• Device−Device Skew Less than 700 ps
• One Input Drives 5 Outputs
• Less than 200 ps Cycle−to−Cycle Jitter is Compatible with PentiumR
• Accepts Spread Spectrum Clock at the Input
• Available in 8 Pin, 150 mil SOIC Package and 8 Pin TSSOP 4.4 mm
• 3.3 V Operation, Advanced 0.35 CMOS Technology
• Guaranteed Across Commercial and Industrial Temperature Ranges
• These are Pb−Free Devices
XXXX = Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.