LTC4245
10
4245fa
PI FU CTIO S
UUU
5V
OUT
: 5V Gate Drive Return; Foldback, ADC and Power
Bad Input. Connect this pin to the source of the 5V supply
external N-channel MOSFET switch for gate drive return.
Power is considered bad if this pin drops below 4.63V or
2.9V depending on the CFG pin. The comparator on this
pin has a built-in hysteresis of 17mV or 11mV. This pin
is also an input to the ADC and the current limit foldback
circuit. A 180Ω active pull-down discharges 5V
OUT
to
ground when the external MOSFET is turned off.
5V
SENSE
: 5V Supply Current Sense and ADC Input. Con-
nect this pin to the output of the 5V current sense resistor.
The current limit circuit controls the 5V
GATE
pin to limit
the sense voltage between the 5V
IN
and 5V
SENSE
pins to
25mV or less during start-up and 75mV thereafter. Dur-
ing start-up a foldback feature reduces the current limit
to 7.5mV as the 5V
OUT
pin approaches ground. A circuit
breaker, enabled after start-up, trips when the sense voltage
exceeds 25mV for 22μs. To disable current limit, connect
this pin to 5V
IN
.
ADR0 to ADR3: Serial Bus Address Inputs. ADR0 and
ADR1 are two-state inputs; ADR2 and ADR3 are three-
state inputs. Tying these pins to ground, open or INTV
CC
confi gures one of 32 possible addresses. The addressing
scheme is compatible with the CompactPCI geographic
addressing for slot identifi cation. See Table 5 in Applica-
tions Information.
ALERT#: Fault Alert Output. Open-drain logic output that can
be pulled to ground, when a fault occurs, to alert the host
controller. A fault alert is enabled by the ALERT register.
This device is compatible with SMBus alert protocol. See
Applications Information. Tie to ground if unused.
BD_SEL#: Board Present Input. Ground this pin to enable
the N-channel MOSFETs to turn on. When this pin is high,
the MOSFETs are off. An internal 10μA current source
pulls up this pin to INTV
CC
. Transitions on this pin will be
recorded in the FAULT2 register. A high-to-low transition
activates the logic to read the state of the ON pin and clear
faults. See Applications Information.
CFG: Supply Confi guration Three-State Input. When this
pin is grounded, all four supply inputs must satisfy their
undervoltage lockout levels to allow the external MOSFETs
to turn on. Floating this pin disables V
EE
undervoltage
lockout and power bad functions, allowing other supplies
to turn-on even when –12V supply is absent. Tying this
pin to INTV
CC
not only disables V
EE
, but also converts
the 5V
IN
undervoltage, power bad and ADC levels to 3.3V
levels. This allows using an extra 3.3V supply instead of
a 5V supply as in a PCI Express application.
EXPOSED PAD (Pin 39, UHF Package): Exposed Pad may
be left open or connected to device ground.
GND: Device Ground.
GPIO1 to GPIO3 (GPIO2, GPIO3 on UHF package only):
General Purpose Input/Output and ADC Input. Open-drain
logic outputs and logic inputs. Any one of the three pins
can be multiplexed to the GPIO channel of the internal
ADC. GPIO1 has a state change fault associated with it.
The GPIO register (Table 13) contains status and control
bits for these pins.
HEALTHY#: Board Power Status Output. This pin is pulled
low by an open-drain output when all supply outputs are
above their power bad thresholds and when all external
N-channel MOSFETs are on. When any supply output
falls below its power bad threshold voltage, this pin will
go high after a 15μs deglitching time.
INTV
CC
: Internal Low Voltage Supply Decoupling Output.
Connect a 0.1μF capacitor from this pin to ground. When
this pin falls below 3.8V, the internal registers are reset.
LOCAL_PCI_RST#: Reset Output. This pin is pulled low by
an open-drain output whenever HEALTHY# is high or when
the PCI_RST# input is low. Tie to ground if unused.
ON: On Control Input. A rising edge turns on the external
N-channel MOSFETs and a falling edge turns them off.
This pin is also used to confi gure the state of the FET On
control bits (and hence the external FETs) in the ON regis-
ter. For example, if the ON pin is tied high, then one or all
(depending on the Sequence control bit) FET On control
bits will go high 100ms after power-up. Likewise if the ON
pin is tied low then the part will remain off after power-up
until the FET On control bits are set high using the I
2
C
bus. If the Sequence control bit is set, taking ON pin high
turns on the supplies in a 12V, 5V, 3.3V, –12V sequence.
A high-to-low transition on this pin will clear faults.
LTC4245
11
4245fa
PI FU CTIO S
UUU
PCI_RST#: Reset Input. Pulling this pin low causes LO-
CAL_PCI_RST# to pull low. When high, LOCAL_PCI_RST#
is the logical inverse of HEALTHY#. Tie to INTV
CC
if
unused.
PGI: Power Good Input. Tie this pin to the
R
E
S
E
T output
of an external supply monitor or power good output of a
DC/DC converter. When all supplies have been turned on,
a timing cycle is started at the end of which the PGI pin is
sampled. If it is low, all external MOSFETs are shut off. If
the PGI Disable control bit C3 is not set, pulling this pin
low for more than 20μs during normal operation will also
shut off all MOSFETs. Tie to INTV
CC
if unused.
PRECHARGE: Bus Precharge Output. This pin can source
70mA at 1V as soon as 3V
IN
is powered-up. Leave it open
if unused.
SCL: Serial Bus Clock Input. Data at the SDA pin is shifted
in or out on rising edges of SCL. This is a high impedance
pin that is generally driven by an open-collector output
from a master controller.
SDA: Serial Bus Data Input and Output. This is a high
impedance input when address, command or data bits
are shifted in. It is an open-drain output when sending
data back to the master controller or acknowledging a
write operation. An external pull-up resistor or current
source is required.
SS: Soft-Start Input. Connect a capacitor between this pin
and ground to set the rate of increase of current limit during
start-up for dI/dt limited inrush current. When an external
MOSFET is turned on, a 20μA pull-up current charges the
capacitor. The voltage ramp on the capacitor is converted
into an internal current limit increasing linearly with time.
Leave it open if dI/dt limited inrush is not required.
TIMER: Timer Input. A capacitor between this pin and
ground sets the duration of the start-up, PGI and auto-retry
timing cycles to be 23.3ms/μF, 233ms/μF and 1.17s/μF
respectively. A timing cycle consists of TIMER being
charged to 2.56V with an internal pull-up current source
and then being reset by a switch to ground. The timing
cycle ends when TIMER falls below 0.23V. The start-up,
PGI and auto-retry timing cycles use 100μA, 10μA and
2μA pull-up current sources respectively.
V
EEGATE
: Gate Drive for –12V Supply External N-Chan-
nel MOSFET. An internal 20μA current source charges
the gate of the external N-channel MOSFET. An internal
clamp limits the gate voltage to 6.2V above V
EEIN
. During
turn-off, a 3.5mA pull-down current discharges V
EEGATE
to V
EEIN
. During short-circuit a 65mA pull-down current
between V
EEGATE
and V
EEIN
is activated. If a –12V supply
is not available, connect V
EEGATE
to ground and use the
CFG pin appropriately.
V
EEIN
: –12V Supply, Current Sense and ADC Input. An
undervoltage lockout circuit, with 38mV hysteresis, pre-
vents any external MOSFET from turning on when this
pin is above –10.5V. The V
EEIN
undervoltage lockout can
be disabled by using the CFG pin. If a –12V supply is not
available, connect V
EEIN
to ground and use the CFG pin
appropriately.
V
EEOUT
: –12V Supply Foldback, ADC and Power Bad Input.
Connect this pin to the drain of the –12V supply external
N-channel MOSFET switch. Power is considered bad if this
pin rises above –11.1V. The comparator on this pin has a
built-in hysteresis of 54mV. The V
EEOUT
power bad function
can be disabled by using the CFG pin. This pin is also an
input to the ADC and the current limit foldback circuit. A
1800Ω active pull-up discharges V
EEOUT
to ground when
the external MOSFET is turned off. If a –12V supply is not
available, connect V
EEOUT
to ground and use the CFG pin
appropriately.
V
EESENSE
: –12V Supply Current Sense and ADC Input.
Connect this pin to the output of the –12V current sense
resistor. The current limit circuit controls the V
EEGATE
pin
to limit the sense voltage between the V
EESENSE
and V
EEIN
pins to 50mV or less during start-up and 150mV thereafter.
During start-up a foldback feature lowers the current limit
to 16mV as the V
EEOUT
pin approaches ground. A circuit
breaker, enabled after start-up, trips when the sense voltage
exceeds 50mV for 22μs. To disable current limit, connect
this pin to V
EEIN
. If a –12V supply is not available, connect
V
EESENSE
to ground and use the CFG pin appropriately.
LTC4245
12
4245fa
BLOCK DIAGRA
W
+
+
+
CP
TL
CP
TH
V
CC
V
CC
V
CC
3.8V
M1
I
TMR
100µA,
10µA,
2µA
0.23V
1.235V
4
4
4
M3
2.56V
TIMER CONTROL
+
12V
IN
20µA
4
8
RESET
+
+
SS
SS
25mV
RESET
50mV
5.5V
GEN
12V
IN
12V
OUT
3V
OUT
3V
GATE
12V
GATE
3V
SENSE
3V
IN
PRECHARGE
SS
PGI
CFG
HEALTHY#
LOCAL_PCI_RST#
PCI_RST#
GPI01
GPI02*
GND
V
EEOUT
V
EEGATE
V
EESENSE
ADR3
ADR0
ALERT#
SDA
SCL
TIMER
ON
BD_SEL#
5V
OUT
5V
GATE
5V
SENSE
5V
IN
INTV
CC
ADR2
ADR1
V
EEIN
12V
SENSE
12V
IN
V
CC
I
SS
M2
RAMP
5
HI: 0 TO 40mV
LO: 75mV
RAMP
12
HI: 30mV
LO: 0mV
RAMP
EE
HI: 0 TO 80mV
LO: 150mV
–12V ECB TRIP
TO LOGIC
RAMP
EE
HI: 30mV
LO: 0mV
RAMP
12
HI: 0 TO 80mV
LO: 150mV
RAMP
3
HI: 15mV
LO: 0mV
RAMP
5
HI: 15mV
LO: 0mV
+
+
+
ECB
5
ECB
12
ECB
EE
ACL
3
5V ACL ON
5V
ECB
TRIP
12V
ECB
TRIP
3.3V ECB
TRIP
RAMP
3
HI:
0 TO
40mV
LO:
75mV
ACL
5
ACL
12
ACL
EE
12V
ACL
ON
3.3V ACL ON
2.3R
R
GATE DRIVER
LOGIC
GATE DRIVER
CHARGE PUMP
GATE DRIVER
D[5]
G[3]
G[0]
A[6]
D[7]
D[4]
D[6]
+
+
+
+
+
+
+
+
12V
IN
20µA
20µA
2µA
+
+
+
25mV
M4
M5
12V
OUT
5V
OUT
3V
OUT
V
EEOUT
12V
IN
5V
IN
3V
IN
V
EEIN
POWER
BAD
MONITOR
FOLDBACK
UVL
MONITOR
G[4]
G[1]
M6
G[5]
A[4]
A[3]
G[2]
M7
V
CC
RAMP
XX
10µA
8
5
8
1 OF 13
MUX
4
4
4
V
IN
V
IN
-V
SENSE
V
OUT
GPIO1
GPIO2
GPIO3
SS
REGISTER
ARRAY
A TO U
ADDRESS
SELECT
1 OF 32
I
2
C
ADC
+
+
+
+
+
+
GATE DRIVER
GPI03*
* UHF PACKAGE ONLY
A[6], D[7], etc. REFER TO REGISTER BITS
50mV
EXPOSED PAD*
–12V ACL ON, TO LOGIC
20µA
RAMP
XX
SS
B[3]
ECB
3

LTC4245IG#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers Quad Hot Swap Contr. w/ADC and I2C
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union