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MT18KSF1G72AZ-1G4D1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
Table 13: DDR3 I
DD
Specifications and Conditions – 8GB (Die Revision P)
Values are for the MT41K512M8 DDR3L SDRAM only and are computed from values specified in the 1.35V 4Gb (512 Meg x
8) component data sheet
Parameter Symbol 1600 1333 Units
Operating current 0: One bank ACTIVATE-to-PRECHARGE I
DD0
1
360 342 mA
Operating current 1: One bank ACTIVATE-to-READ-to-PRECHARGE I
DD1
1
495 477 mA
Precharge power-down current: Slow exit I
DD2P0
2
198 180 mA
Precharge power-down current: Fast exit I
DD2P1
2
270 270 mA
Precharge quiet standby current I
DD2Q
2
306 288 mA
Precharge standby current I
DD2N
2
297 270 mA
Precharge standby ODT current I
DD2NT
1
270 270 mA
Active power-down current I
DD3P
2
378 360 mA
Active standby current I
DD3N
2
378 360 mA
Burst read operating current I
DD4R
1
1017 900 mA
Burst write operating current I
DD4W
1
1116 999 mA
Refresh current I
DD5B
1
1467 1458 mA
Self refresh temperature current: MAX T
C
= 85°C I
DD6
2
270 270 mA
Self refresh temperature current (SRT-enabled): MAX T
C
= 95°C I
DD6ET
2
414 414 mA
All banks interleaved read current I
DD7
1
1413 1260 mA
Reset current I
DD8
2
234 234 mA
Notes:
1. One module rank in the active I
DD
; the other rank in I
DD2P0
(slow exit).
2. All ranks in this I
DD
condition.
4GB, 8GB (x72, ECC, DR) 240-Pin DDR3L UDIMM
I
DD
Specifications
PDF: 09005aef83cd9e75
ksf18c512_1gx72az.pdf - Rev. J 10/15 EN
16
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
Temperature Sensor with Serial Presence-Detect EEPROM
The temperature sensor continuously monitors the module's temperature and can be
read back at any time over the I
2
C bus shared with the SPD EEPROM. Refer to JEDEC
standard No. 21-C page 4.7-1, "Definition of the TSE2002av, Serial Presence Detect with
Temperature Sensor."
Serial Presence-Detect
For the latest SPD data, refer to Micron's SPD page: micron.com/SPD.
Table 14: Temperature Sensor with SPD EEPROM Operating Conditions
Parameter/Condition Symbol Min Max Units
Supply voltage V
DDSPD
3.0 3.6 V
Supply current: V
DD
= 3.3V I
DD
– 2.0 mA
Input high voltage: Logic 1; SCL, SDA V
IH
V
DDSPD
x 0.7 V
DDSPD
+ 1 V
Input low voltage: Logic 0; SCL, SDA V
IL
–0.5 V
DDSPD
x 0.3 V
Output low voltage: I
OUT
= 2.1mA V
OL
– 0.4 V
Input current I
IN
–5.0 5.0 µA
Temperature sensing range – –40 125 °C
Temperature sensor accuracy (class B) – –1.0 1.0 °C
Table 15: Temperature Sensor and SPD EEPROM Serial Interface Timing
Parameter/Condition Symbol Min Max Units
Time bus must be free before a new transition can
start
t
BUF 4.7 – µs
SDA fall time
t
F 20 300 ns
SDA rise time
t
R – 1000 ns
Data hold time
t
HD:DAT 200 900 ns
Start condition hold time
t
H:STA 4.0 – µs
Clock HIGH period
t
HIGH 4.0 50 µs
Clock LOW period
t
LOW 4.7 – µs
SCL clock frequency
t
SCL 10 100 kHz
Data setup time
t
SU:DAT 250 – ns
Start condition setup time
t
SU:STA 4.7 – µs
Stop condition setup time
t
SU:STO 4.0 – µs
4GB, 8GB (x72, ECC, DR) 240-Pin DDR3L UDIMM
Temperature Sensor with Serial Presence-Detect EEPROM
PDF: 09005aef83cd9e75
ksf18c512_1gx72az.pdf - Rev. J 10/15 EN
17
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
EVENT# Pin
The temperature sensor also adds the EVENT# pin (open-drain). Not used by the SPD
EEPROM, EVENT# is a temperature sensor output used to flag critical events that can be
set up in the sensor’s configuration register.
EVENT# has three defined modes of operation: interrupt mode, compare mode, and
critical temperature mode. Event thresholds are programmed in the 0x01 register using
a hysteresis. The alarm window provides a comparison window, with upper and lower
limits set in the alarm upper boundary register and the alarm lower boundary register,
respectively. When the alarm window is enabled, EVENT# will trigger whenever the
temperature is outside the MIN or MAX values set by the user.
The interrupt mode enables software to reset EVENT# after a critical temperature
threshold has been detected. Threshold points are set in the configuration register by
the user. This mode triggers the critical temperature limit and both the MIN and MAX of
the temperature window.
The compare mode is similar to the interrupt mode, except EVENT# cannot be reset by
the user and returns to the logic HIGH state only when the temperature falls below the
programmed thresholds.
Critical temperature mode triggers EVENT# only when the temperature has exceeded
the programmed critical trip point. When the critical trip point has been reached, the
temperature sensor goes into comparator mode, and the critical EVENT# cannot be
cleared through software.
4GB, 8GB (x72, ECC, DR) 240-Pin DDR3L UDIMM
Temperature Sensor with Serial Presence-Detect EEPROM
PDF: 09005aef83cd9e75
ksf18c512_1gx72az.pdf - Rev. J 10/15 EN
18
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

MT18KSF1G72AZ-1G4D1

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Buy MT18KSF1G72AZ-1G4D1
Manufacturer:
Micron
Description:
MODULE DDR3L SDRAM 8GB 240UDIMM
Lifecycle:
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