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LTC2925IUF#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
LTC2925
16
2925fd
For more information www.linear.com/LTC2925
applicaTions inForMaTion
Ratiometric Tracking Example
This example converts the coincident tracking example to
the ratiometric tracking profile shown in Figure 13, using
three supplies without an external FET. The ramp rate of
the master signal remains unchanged (step 1) and there
is no delay in ratiometric tracking (step 3), so only the
result of step 2 in the 3-step design procedure needs to
be considered. In this example, the ramp rate of the 1.8V
slave 1 supply ramps up at 60V/s, the 2.5V slave 2 supply
ramps up at 85V/s, and the 1.5V slave 3 supply ramps up
at 50V/s. Always verify that the chosen ramp rate will al
-
low the supplies to ramp-up completely before RAMPBUF
reaches V
CC
. If the 1.8V supply were to ramp-up at 50V/s
it would only reach 1.65V because the RAMPBUF signal
would reach its final value of V
CC
= 3.3V before the slave
supply reached 1.8V.
2. Solve for the pair of resistors that provide the desired
slave supply behavior, assuming no delay.
From Equation 2:
Rk
Vs
Vs
k
TB
=• ≈16 5
100
60
27 4.
/
/
.
Figure 13. Ratiometric Tracking from Figure 14
SLAVE2
SLAVE1
1V/DIV
1V/DIV
SLAVE3
10ms/DIV 10ms/DIV
2925 F13
0.1µF
C
PGTMR
0.82µF
10k
V
CC
SENSEP SENSEN
3.3V
V
IN
3.3V
R
ONB
138k
R
TB1
27.4k
R
TB2
100k
R
FA2
41.2k
2.5V
SLAVE2
R
FB2
88.7k
R
TA2
38.3k
R
TB3
174k
R
TA3
63.4k
R
TA1
10k
R
ONA
100k
RAMPBUF
TRACK1
TRACK2
TRACK3
FB2
LTC2925
PGTMR
C
SDTMR
0.082µF
SDTMR
C
SCTMR
0.41µF
SCTMR
GND
2925 F14
R
FA3
100k
1.5V
SLAVE3
R
FB3
86.6k
DC/DC
IN
FB = 0.8V OUT
DC/DC
IN
FB = 0.8V
RUN/SS
RUN/SS
OUT
FB3
3.3V
PGI
R
FA1
35.7k
1.8V
SLAVE1
R
FB1
16.5k
SUPPLY
MONITOR
DC/DC
IN
FB = 1.235V
RUN/SS
OUT
FB1
FAULT
ON
10k
V
IN
STATUS
REMOTE
RST
C
GATE
0.1µF
3.3V V
IN
GATE RAMP
SD3
SD2
SD1
Figure 14. Ratiometric Tracking Example
From Equation 3:
R
V
V
k
V
k
V
k
k
TA
ʹ=
+
≈
08
1 235
16 5
1 235
35 7
08
27 5
10
.
.
.
.
.
–
.
.
Step 3 is unnecessary because there is no delay, so
R
TA
= R
TA
´.
LTC2925
17
2925fd
For more information www.linear.com/LTC2925
applicaTions inForMaTion
Offset Tracking Example
Converting the circuit in the coincident tracking example
to the offset tracking shown in Figure 15 is relatively
simple. Here the 1.8V slave 1 supply ramps up 1V below
the master. The ramp rate remains the same (100V/s), so
there are no changes necessary to steps 1 and 2 of the
3-step design procedure. Only step 3 must be considered.
Be sure to verify that the chosen voltage offsets will allow
the slave supplies to ramp up completely. In this example,
if the voltage offset were 2V, the slave supply would only
ramp up to 3.3V – 2V = 1.3V.
3. Choose R
TA
to obtain the desired delay.
First, convert the desired voltage offset, V
OS
, to a delay,
t
D
, using the ramp rate:
t
V
S
V
Vs
ms
D
OS
S
== =
1
100
10 6
/
()
From Equation 4:
R
Vk
ms Vs
k
TA
==
08 16 5
1 100
13 2
.•.
•/
.
From Equation 5:
Rkkk
TA
=≈13 1132 665.||. .
0.015Ω
Q1
Si4412ADY
0.1µF
C
PGTMR
0.82µF
10k
V
CC
SENSEP SENSEN
3.3V
V
IN
3.3V
R
ONB
138k
3.3V V
IN
R
TB1
16.5k
R
TB2
88.7k
R
FA2
41.2k
2.5V
SLAVE2
MASTER
R
FB2
88.7k
R
TA2
31.6k
R
TB3
86.6k
R
TA3
31.6k
R
TA1
6.65k
R
ONA
100k
RAMPBUF
TRACK1
TRACK2
TRACK3
FB2
GATE
LTC2925
PGTMR
C
SDTMR
0.082µF
SDTMR
C
SCTMR
0.41µF
SCTMR
GND
2925 F16
RAMP
R
FA3
100k
1.5V
SLAVE3
R
FB3
86.6k
DC/DC
IN
FB = 0.8V OUT
DC/DC
IN
FB = 0.8V
RUN/SS
RUN/SS
OUT
FB3
3.3V
PGI
R
FA1
35.7k
1.8V
SLAVE1
R
FB1
16.5k
SUPPLY
MONITOR
DC/DC
IN
FB = 1.235V
RUN/SS
OUT
FB1
FAULT
ON
10k
V
IN
STATUS
REMOTE
RST
SD3
SD2
SD1
C
GATE
0.1µF
10Ω
SLAVE2
MASTER
SLAVE1
1V/DIV
1V/DIV
SLAVE3
10ms/DIV 10ms/DIV
2925 F15
Figure 15. Offset Tracking from Figure 16
Figure 16. Offset Tracking Example
LTC2925
18
2925fd
For more information www.linear.com/LTC2925
applicaTions inForMaTion
Supply Sequencing Example
In Figure 17, the three slave supplies are sequenced in-
stead of tracking. As in the coincident tracking example,
the 3.3V
master supply ramps up at
100V/s through an
external FET, so step 1 remains the same. The 1.8V slave
1 supply ramps up at 1000V/s beginning 10ms after the
master signal starts to ramp up. The 2.5V slave 2 supply
ramps up at 1000V/s beginning 20ms after the master
signal begins to ramp up. The 1.5V slave 3 supply ramps
up at 1000V/s beginning 25ms after the master signal
begins to ramp up. Note that not every combination of
ramp rates and delays is possible. Small delays and large
ratios of slave ramp rate to master ramp rate may result
in solutions that require negative resistors. In such cases,
either the delay must be increased or the ratio of slave
ramp rate to master ramp rate must be reduced. In this
example, solving for the slave 1 supply yields:
2. Solve for the pair of resistors that provide the desired
slave supply behavior, assuming no delay.
From Equation 2:
Rk
Vs
Vs
k
TB
=• ≈16 5
100
1000
165.
/
/
.
From Equation 3:
R
V
V
k
V
k
V
k
k
TA
ʹ=
+
≈
08
1 235
16 5
1 235
35 7
08
165
213
.
.
.
.
.
–
.
.
–.
SLAVE2
MASTER
SLAVE1
1V/DIV
1V/DIV
SLAVE3
10ms/DIV 10ms/DIV
2925 F17
Figure 17. Supply Sequencing from Figure 18
3. Choose R
TA
to obtain the desired delay.
From Equation 4:
R
Vk
ms Vs
k
TA
==
08 165
10 100
132
.•.
•/
.
From Equation 5:
Rkkk
TA
=≈–. || ..213132 348
0.015Ω
Q1
Si4412ADY
0.1µF
C
PGTMR
0.82µF
10k
V
CC
SENSEP SENSEN
3.3V
V
IN
3.3V
R
ONB
138k
3.3V V
IN
R
TB1
1.65k
R
TB2
8.87k
R
FA2
41.2k
2.5V
SLAVE2
MASTER
R
FB2
88.7k
R
TA2
4.87k
R
TB3
8.66k
R
TA3
3.74k
R
TA1
3.48k
R
ONA
100k
RAMPBUF
TRACK1
TRACK2
TRACK3
FB2
GATE
LTC2925
PGTMR
C
SDTMR
0.082µF
SDTMR
C
SCTMR
0.41µF
SCTMR
GND
2925 F18
RAMP
R
FA3
100k
1.5V
SLAVE3
R
FB3
86.6k
DC/DC
IN
FB = 0.8V OUT
DC/DC
IN
FB = 0.8V
RUN/SS
RUN/SS
OUT
FB3
3.3V
PGI
R
FA1
35.7k
1.8V
SLAVE1
R
FB1
16.5k
SUPPLY
MONITOR
DC/DC
IN
FB = 1.235V
RUN/SS
OUT
FB1
FAULT
ON
10k
V
IN
STATUS
REMOTE
RST
SD3
SD2
SD1
C
GATE
0.1µF
10Ω
Figure 18. Supply Sequencing Example
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LTC2925IUF#PBF

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Buy LTC2925IUF#PBF
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Pwr Supply Sequence/Tracking Controller
Lifecycle:
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