P3041NXE7PNC

Confidential and Proprietary
TM
Erratum A-007207: TBI LINK
STATUS SGMII STAYS UP
PB #16224
May 2014
Affected Devices: P2040 P2041 P3041 P4080
P5020 P5040
TM
Confidential and Proprietary
2
Erratum – A-007207
TM
Confidential and Proprietary
3
Erratum – A-007207
TBI link status may stay “up” after SGMII electrical idle detected
Devices: P2040 P2041 P3041 P4080 P5020 P5040
Description:
The TBI Status Register (SR) contains a link status bit (TBI SR [Link Status]) that represents
the current state of the SGMII link. If Auto-Negotiation (AN) is disabled, the TBI link status bit
should become a b’1 indicating the link is up after recognizing IDLE sequences, and stay at
b’1 as long as valid data is received & the TBI is not reset. TBI link status bit should become a
b’0 indicating the link is down after several invalid characters are received or the TBI is reset. If
AN is enabled, the TBI link status bit does not become set to b’1 until auto-negotiation is
complete (TBI CR [AN DONE]=1), but the same conditions as AN disabled then apply for the
TBI link status bit to get cleared to b’0.
An electrical idle (common mode) condition on the SGMII link results in the reception of invalid
data, and should cause the TBI link status bit to get cleared. If the transition from active to
common mode takes enough time that the Rx is able to recognize at least 4 more K28.5
characters (for IDLE sequences, 70-80 UI), the portion of the design intended to detect the link
down condition may shut off before the link down condition is actually reflected in the TBI.
This premature shutdown may
cause the TBI link status to remain set to a b’1 indicating the
link is up. This 'stuck at 1' condition would persist until valid K28.5 characters are received
again.

P3041NXE7PNC

Mfr. #:
Manufacturer:
NXP / Freescale
Description:
Microprocessors - MPU P3041-1500MHZ XT R2.0
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet