P3041NXE7PNC

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Confidential and Proprietary
7
Steps to Read TBI Status and Receive Electrical Idle
Action Register
write MIIMCOM[Read Cycle] = 1
write MIIMADD[PHY Address] = value from TBIPA for dTSEC used
write MIIMADD[Register Address] = 1 for TBI Status Register (SR)
write MIIMCOM[Read Cycle] = 0 to ensure 0 -> 1 transition for non-stale data
write MIIMCOM[Read Cycle] = 1
read MIIMSTAT[PHY Status] for value in TBI SR. Check TBI SR[Link Status]. ‘0’ means
link is down.
read BnGCRm1[REIDL]where m means bank and n means lane. ‘1’ means link is down.
‘0’ means non-electrical idle state but could be receiving invalid symbols which
would result in a link down.
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P3041NXE7PNC

Mfr. #:
Manufacturer:
NXP / Freescale
Description:
Microprocessors - MPU P3041-1500MHZ XT R2.0
Lifecycle:
New from this manufacturer.
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DHL FedEx Ups TNT EMS
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