7
COMMERCIAL, INDUSTRIAL AND MILITARY
TEMPERATURE RANGES
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
NOTES:
1. EF, FF, HF may change status during Reset, but flags will be valid at t
RSC.
2. W and R = V
IH around the rising edge of RS.
Figure 2. Reset
Figure 4. Full Flag From Last Write to First Read
Figure 3. Asynchronous Write and Read Operation
W
RS
R
EF
HF, FF
t
RSC
t
RS
t
RSS
t
RSS
t
RSR
t
EFL
t
HFH ,
t
FFH
2679 drw 04
t
A
R
t
RC
DATA
OUT
VALID DATA
OUT
VALID
t
RPW
t
RLZ
t
DV
t
A
t
RHZ
t
RR
t
WC
t
WR
t
WPW
DATA
IN
VALID DATA
IN
VALID
t
DS
t
DH
Q
0
-Q
8
2679 drw 05
W
D
0
-D
8
LAST WRITE
R
IGNORED
WRITE
FIRST READ ADDITIONAL
READS
W
FF
tWFF
tRFF
FIRST
WRITE
2679 drw 06
8
COMMERCIAL, INDUSTRIAL AND MILITARY
TEMPERATURE RANGES
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
LAST READ
R
IGNORED
READ
FIRST WRITE ADDITIONAL
WRITES
W
EF
t
WEF
VALID
t
A
DATA OUT
t
REF
2679 drw 07
FIRST READ
VALID
Figure 5. Empty Flag From Last Read to First Write
Figure 8. Minimum Timing for a Full Flag Coincident Write Pulse
Figure 7. Minimum Timing for an Empty Flag Coincident Read Pulse
Figure 6. Retransmit
tRTC
tRT
tRTS
RT
W,R
HF, EF, FF
t
RTR
FLAG VALID
2679 drw 08
tRTF
EF
W
R
tWEF
tRPE
2679 drw 09
FF
R
W
tRFF
tWPF
2679 drw 10
9
COMMERCIAL, INDUSTRIAL AND MILITARY
TEMPERATURE RANGES
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
Figure 9. Half-Full Flag Timing
Figure 10. Expansion Out
Figure 11. Expansion In
OPERATING MODES:
Care must be taken to assure that the appropriate flag is monitored by
each system (i.e. FF is monitored on the device where W is used; EF is monitored
on the device where R is used). For additional information, refer to Tech Note
8: Operating FIFOs on Full and Empty Boundary Conditions and Tech Note
6: Designing with FIFOs.
SINGLE DEVICE MODE
A single IDT7200/7201A/7202A may be used when the application
requirements are for 256/512/1,024 words or less. These devices are in a
Single Device Configuration when the Expansion In (XI) control input is
grounded (see Figure 12).
DEPTH EXPANSION
The IDT7200/7201A/7202A can easily be adapted to applications when
the requirements are for greater than 256/512/1,024 words. Figure 14
demonstrates Depth Expansion using three IDT7200/7201A/7202As. Any
depth can be attained by adding additional IDT7200/7201A/7202As. These
FIFOs operate in the Depth Expansion mode when the following conditions
are met:
1. The first device must be designated by grounding the First Load (FL) control
input.
2. All other devices must have FL in the HIGH state.
3. The Expansion Out (XO) pin of each device must be tied to the Expansion
In (XI) pin of the next device. See Figure 14.
4. External logic is needed to generate a composite Full Flag (FF) and Empty
Flag (EF). This requires the ORing of all EFs and ORing of all FFs (i.e.
all must be set to generate the correct composite FF or EF). See Figure
14.
5. The Retransmit (RT) function and Half-Full Flag (HF) are not available in
the Depth Expansion Mode.
For additional information, refer to Tech Note 9: Cascading FIFOs or
FIFO Modules.
R
W
HF
t
RHF
HALF-FULL OR LESS
MORE THAN HALF-FULL
t
WHF
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HALF-FULL OR LESS
R
W
XO
2679 drw 12
WRITE TO
LAST PHYSICAL
LOCATION
t
XOL
t
XOH
READ FROM
LAST PHYSICAL
LOCATION
t
XOL
t
XOH
W
R
XI
WRITE TO
FIRST PHYSICAL
LOCATION
t
XIS
READ FROM
FIRST PHYSICAL
LOCATION
t
XIS
t
XI
t
XIR
2679 drw 13

7200L20TDB

Mfr. #:
Manufacturer:
IDT
Description:
FIFO 256 X 9 CMOS PARALLEL FIF
Lifecycle:
New from this manufacturer.
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