Data Sheet No. PD60172 Rev.G
Typical Connection
HIGH AND LOW SIDE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V and 5V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5V offset.
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4A/1.8A
Also available LEAD-FREE (PbF)
IR21814
IR2181
IR2181
(
4
)(
S
) & (PbF)
www.irf.com 1
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(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
Description
The IR2181(4)(S) are high voltage,
high speed power MOSFET and IGBT
drivers with independent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune
CMOS technologies enable rugge-
dized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to
3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side
configuration which operates up to 600 volts.
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
IR2181/IR2183/IR2184 Feature Comparison
Packages
14-Lead PDIP
IR21814
8-Lead PDIP
IR2181
14-Lead SOIC
IR21814S
8-Lead SOIC
IR2181S
IR2181
(
4
) (
S
) & (PbF)
2 www.irf.com
Symbol Definition Min. Max. Units
V
B
High side floating absolute voltage -0.3 625
V
S
High side floating supply offset voltage V
B
- 25 V
B
+ 0.3
V
HO
High side floating output voltage V
S
- 0.3 V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage -0.3 25
V
LO
Low side output voltage -0.3 V
CC
+ 0.3
V
IN
Logic input voltage (HIN & LIN - IR2181/IR21814) V
SS
- 0.3 V
SS
+ 10
V
SS
Logic ground (IR21814 only) V
CC
- 25 V
CC
+ 0.3
dV
S
/dt Allowable offset supply voltage transient 50 V/ns
P
D
Package power dissipation @ T
A
+25°C (8-lead PDIP) 1.0
(8-lead SOIC) 0.625
(14-lead PDIP) 1.6
(14-lead SOIC) 1.0
Rth
JA
Thermal resistance, junction to ambient (8-lead PDIP) 125
(8-lead SOIC) 200
(14-lead PDIP) 75
(14-lead SOIC) 120
T
J
Junction temperature 150
T
S
Storage temperature -50 150
T
L
Lead temperature (soldering, 10 seconds) 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
V
°C/W
W
°C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: HIN and LIN pins are internally clamped with a 5.2V zener diode.
VB High side floating supply absolute voltage V
S
+ 10 V
S
+ 20
V
S
High side floating supply offset voltage Note 1 600
V
HO
High side floating output voltage V
S
V
B
V
CC
Low side and logic fixed supply voltage 10 20
V
LO
Low side output voltage 0 V
CC
V
IN
Logic input voltage (HIN & LIN - IR2181/IR21814) V
SS
V
SS
+ 5
V
SS
Logic ground (IR21814/IR21824 only) -5 5
T
A
Ambient temperature -40 125 °C
V
Symbol Definition Min. Max. Units
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15V differential.
IR2181
(
4
) (
S
) & (PbF)
www.irf.com 3
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, V
SS
= COM, C
L
= 1000 pF, T
A
= 25°C.
Symbol Definition Min. Typ. Max. Units Test Conditions
t
on
Turn-on propagation delay 180 270 V
S
= 0V
t
off
Turn-off propagation delay 220 330 V
S
= 0V or 600V
MT Delay matching, HS & LS turn-on/off 0 35
t
r
Turn-on rise time 40 60 V
S
= 0V
t
f
Turn-off fall time 20 35 V
S
= 0V
nsec
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, V
SS
= COM and T
A
= 25°C unless otherwise specified. The V
IL
, V
IH
and I
IN
parameters are
referenced to V
SS
/COM and are applicable to the respective input leads HIN and LIN. The V
O
, I
O
and Ron parameters are
referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V
IH
Logic “1” input voltage
(IR2181/IR21814 )
2.7
V
CC
= 10V to 20V
V
IL
Logic “0” input voltage
(IR2181/IR21814)
0.8
V
CC
= 10V to 20V
V
OH
High level output voltage, V
BIAS
- V
O
1.2 I
O
= 0A
V
OL
Low level output voltage, V
O
0.1 I
O
= 0A
I
LK
Offset supply leakage current 50 V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current 20 60 150 V
IN
= 0V or 5V
I
QCC
Quiescent V
CC
supply current 50 120 240 V
IN
= 0V or 5V
I
IN+
Logic “1” input bias current
25
60
V
IN
= 5V
I
IN-
Logic “0” input bias current
1.0
V
IN
= 0V
V
CCUV+
V
CC
and V
BS
supply undervoltage positive going 8.0 8.9 9.8
V
BSUV+
threshold
V
CCUV-
V
CC
and V
BS
supply undervoltage negative going 7.4 8.2 9.0
V
BSUV-
threshold
V
CCUVH
Hysteresis 0.3 0.7
V
BSUVH
I
O+
Output high short circuit pulsed current 1.4 1.9 V
O
= 0V,
PW10 µs
I
O-
Output low short circuit pulsed current 1.8 2.3 V
O
= 15V,
PW10 µs
V
µA
V
A

IR2181SPBF

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
Gate Drivers High Low Side DRVR 600V 10 to 20V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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