Electrical Specifications
Table 4: DC Electrical Characteristics and Operating Conditions
All voltages are referenced to V
SS
Parameter/Condition Symbol Min Nom Max Unit Notes
Supply voltage V
DD
1.425 1.5 1.575 V 1, 2, 3
I/O supply voltage V
DDQ
1.425 1.5 1.575 V 1, 2, 3
Supply voltage V
DD
1.283 1.35 1.45 V 1, 2, 4
I/O supply voltage V
DDQ
1.283 1.35 1.45 V 1, 2, 4
Notes:
1. V
DD
and V
DDQ
must track one another. V
DDQ
must be ≤ V
DD
. V
SS
= V
SSQ
.
2. V
DD
and V
DDQ
may include AC noise of ±50mV (250 kHz to 20 MHz) in addition to the
DC (0 Hz to 250 kHz) specifications. V
DD
and V
DDQ
must be at same level for valid AC
timing parameters.
3. Valid with all speed bins.
4. Not for use with -093 speed bin.
Table 5: Input/Output Capacitance
Note 1 applies to the entire table
Capacitance
Parameters Symbol
gDDR3-1600 gDDR3-1800 gDDR3-2000 gDDR3-2200
Unit
Note
sMin Max Min Max Min Max Min Max
CK and CK# C
CK
0.8 1.4 0.8 1.3 0.8 1.3 0.8 1.3 pF
ΔC: CK to CK# C
DCK
0 0.15 0 0.15 0 0.15 0 0.15 pF
Single-end I/O: DQ, DM C
IO
1.5 2.3 1.5 2.2 1.5 2.1 1.5 2.1 pF 2
Differential I/O: DQS, DQS#,
TDQS, TDQS#
C
IO
1.5 2.3 1.5 2.2 1.5 2.1 1.5 2.1 pF 3
ΔC: DQS to DQS#, TDQS,
TDQS#
C
DDQS
0 0.15 0 0.15 0 0.15 0 0.15 pF 3
ΔC: DQ to DQS C
DIO
–0.5 0.3 –0.5 0.3 –0.5 0.3 –0.5 0.3 pF 4
Inputs (CTRL, CMD, ADDR) C
I
0.75 1.3 0.75 1.2 0.75 1.2 0.75 1.2 pF 5
ΔC: CTRL to CK C
DI_CTRL
–0.4 0.2 –0.4 0.2 –0.4 0.2 –0.4 0.2 pF 6
ΔC: CMD_ADDR to CK C
DI_CMD_AD
DR
–0.4 0.4 –0.4 0.4 –0.4 0.4 –0.4 0.4 pF 7
ZQ pin capacitance C
ZO
– 3.0 – 3.0 – 3.0 – 3.0 pF
Reset pin capacitance C
RE
– 3.0 – 3.0 – 3.0 – 3.0 pF
Notes:
1. V
DD
= +1.5V ±0.075mV, V
DDQ
= V
DD
, V
REF
= V
SS
, f = 100 MHz, T
C
= 25°C. V
OUT(DC)
= 0.5 ×
V
DDQ
, V
OUT
= 0.1V (peak-to-peak).
2. DM input is grouped with I/O pins, reflecting the fact that they are matched in loading.
3. Includes TDQS, TDQS#. C
DDQS
is for DQS vs. DQS# and TDQS vs. TDQS# separately.
4. C
DIO
= C
IO(DQ)
- 0.5 × (C
IO(DQS)
+ C
IO(DQS#)
).
5. Excludes CK, CK#; CTRL = ODT, CS#, and CKE; CMD = RAS#, CAS#, and WE#; ADDR =
A[n:0], BA[2:0].
6. C
DI_CTRL
= C
I(CTRL)
- 0.5 × (C
CK(CK)
+ C
CK(CK#)
).
7. C
DI_CMD_ADDR
= C
I(CMD_ADDR)
- 0.5 × (C
CK(CK)
+ C
CK(CK#)
).
4Gb: x16 gDDR3 SDRAM Graphics Addendum
Electrical Specifications
CCMTD-1005363231-10344
ddr3_4gb_graphics_addendum 091.pdf - Rev. A 05/16 EN
5
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