Typical Connection
HIGH AND LOW SIDE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage dV/dt immune
Gate drive supply range from 5 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5V offset.
Lower di/dt gate driver for better noise immunity
Outputs in phase with inputs
Also available LEAD-FREE (PbF)
Packages
IR2301(S) & (PbF)
8 Lead PDIP
IR2301
8 Lead SOIC
IR2301S
www.irf.com 1
IR2301
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Data Sheet No. PD60201 Rev.D
(Refer to Lead
Assignments for
correct pin con-
figuration). This/
These
diagram(s)
show electrical
connections
only. Please re-
fer to our Appli-
cation Notes
and DesignTips
for proper circuit
board layout.
Description
The IR2301(S) are high voltage, high speed
power MOSFET and IGBT drivers with indepen-
dent high and low side referenced output
channels. Proprietary HVIC and latch immune
CMOS technologies enable ruggedized mono-
lithic construction. The logic input is compatible
with standard CMOS or LSTTL output, down to
3.3V logic. The output drivers feature a high
pulse current buffer stage designed for minimum
driver cross-conduction. The floating channel
can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to
600 volts.
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

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 
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
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  
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
 

µ
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 
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µ

2106/2301//2108//2109/2302/2304 Feature Comparison
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IR2301
(
S) & (PbF)
2 www.irf.com
Symbol Definition Min. Max. Units
V
B
High side floating absolute voltage -0.3 625
V
S
High side floating supply offset voltage V
B
- 25 V
B
+ 0.3
V
HO
High side floating output voltage V
S
- 0.3 V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage -0.3 25
V
LO
Low side output voltage -0.3 V
CC
+ 0.3
V
IN
Logic input voltage COM - 0.3 V
CC
+ 0.3
dV
S
/dt Allowable offset supply voltage transient 50 V/ns
P
D
Package power dissipation @ T
A
+25°C (8 lead PDIP) 1.0
(8 lead SOIC) 0.625
Rth
JA
Thermal resistance, junction to ambient (8 lead PDIP) 125
(8 lead SOIC) 200
T
J
Junction temperature 150
T
S
Storage temperature -50 150
T
L
Lead temperature (soldering, 10 seconds) 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
V
°C
°C/W
W
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
VB High side floating supply absolute voltage V
S
+ 5 V
S
+ 20
V
S
High side floating supply offset voltage Note 1 600
V
HO
High side floating output voltage V
S
V
B
V
CC
Low side and logic fixed supply voltage 5 20
V
LO
Low side output voltage 0 V
CC
V
IN
Logic input voltage COM V
CC
T
A
Ambient temperature -40 150 °C
V
Symbol Definition Min. Max. Units
IR2301
(
S
)
& (PbF)
www.irf.com 3
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF, T
A
= 25°C.
Symbol Definition Min. Typ. Max. Units Test Conditions
t
on
Turn-on propagation delay 220 300 V
S
= 0V
t
off
Turn-off propagation delay 200 280 V
S
= 0V or 600V
MT Delay matching, HS & LS turn-on/off 0 50
t
r
Turn-on rise time 130 220 V
S
= 0V
t
f
Turn-off fall time 50 80 V
S
= 0V
nsec
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, and T
A
= 25°C unless otherwise specified. The V
IL
, V
IH
and I
IN
parameters are referenced to
COM and are applicable to the respective input leads. The V
O
, I
O
and Ron parameters are referenced to COM and are
applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V
IH
Logic “1” input voltage
2.9
V
CC
= 10V to 20V
V
IL
Logic “0” input voltage
0.8
V
CC
= 10V to 20V
V
OH
High level output voltage, V
BIAS
- V
O
0.8 1.4 I
O
= 20 mA
V
OL
Low level output voltage, V
O
0.3 0.6 I
O
= 20 mA
I
LK
Offset supply leakage current 50 V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current 20 60 100 V
IN
= 0V or 5V
I
QCC
Quiescent V
CC
supply current 50 120 190 V
IN
= 0V or 5V
I
IN+
Logic “1” input bias current
5
20
V
IN
= 5V
I
IN-
Logic “0” input bias current
2
V
IN
= 0V
V
CCUV+
V
CC
and V
BS
supply undervoltage positive 3.3 4.1 5
V
BSUV+
going threshold
V
CCUV-
V
CC
and V
BS
supply undervoltage negative 3 3.8 4.7
V
BSUV-
negative going threshold
V
CCUVH
Hysteresis 0.1 0.3
V
BSUVH
I
O+
Output high short circuit pulsed current 120 200 V
O
= 0V,
PW10 µs
I
O-
Output low short circuit pulsed current 250 350 V
O
= 15V,
PW10 µs
V
µA
mA
V

IR2301SPBF

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
Gate Drivers HI LO SIDE DRVR 600V 5V to 20V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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