MTFDHAK960MCH-1AN15ABYY Datasheet MTFDHAK1T6MCG-1AN15ABYY, MTFDHAK1T9MCH-1AN15ABYY, MTFDHAK400MCG-1AN15ABYY | P13-P15

SMART and Health Information

The SSD supports SMART/Health log information as defined in the NVMe specification

as well as extended health information. These logs persist through power cycles and re-

flect lifetime data.

Table 10: SMART/Health Information (Log Identifier 02h)

Bytes Name Description

0 Critical warning Indicates critical warnings for the state of the controller. Each bit corre-

sponds to a critical warning type; multiple bits may be set. If a bit is

cleared to 0, the critical warning does not apply. Critical warnings may

result in an asynchronous event notification to the host.

• Bit 00: If set to 1, the available spare space has fallen below the

threshold.

• Bit 01: If set to 1, the temperature has exceeded a critical threshold.

• Bit 02: If set to 1, the device reliability has been degraded due to sig-

nificant media-related errors or any internal error that degrades de-

vice reliability.

• Bit 03: If set to 1, the media has been placed in read-only mode.

• Bit 04: If set to 1, the volatile memory backup device has failed. This

field is only valid if the controller has a volatile memory backup solu-

tion.

• Bits 07:05 Reserved

2:1 Temperature Contains the temperature of the overall device (controller and NVM in-

cluded) in units of Kelvin. If it exceeds the temperature threshold, an

asynchronous event may be issued to the host. For the 7100, the value

reported is the case temperature.

3 Available spare Contains a normalized percentage (0–100%) of the remaining available

spare capacity, beginning at 100% and decreasing.

4 Available spare threshold When the available spare falls below the threshold indicated in this

field, an asynchronous event may be issued to the host. The value is in-

dicated as a normalized percentage (0–100%). Threshold is set to 10%.

5 Percentage used Contains a vendor-specific estimate of the percentage of the device life

used based on the actual device usage and the manufacturer's predic-

tion of device life.

A value of 100 indicates that the estimated endurance of the device

has been consumed, but may not indicate a device failure.

Refer to the JEDEC JESD218 standard for SSD device life and endurance

measurement techniques.

31:6 Reserved Reserved

47:32 Data units read Contains the number of 512-byte data units the host has read from the

controller; this value does not include metadata. This value is reported

in thousands (that is, a value of 1 corresponds to 1000 units of 512

bytes read) and is rounded up. When the LBA size is a value other than

512 bytes, the controller shall convert the amount of data read to 512-

byte units.

7100 U.2 NVMe PCIe SSD

Supported Commands

CCMTD-731836775-10498

7100_u2_nvme_pcie_ssd.pdf - Rev. G 03/17 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Table 10: SMART/Health Information (Log Identifier 02h) (Continued)

Bytes Name Description

63:48 Data units written Contains the number of 512-byte data units the host has written to the

controller; this value does not include metadata. This value is reported

in thousands (that is, a value of 1 corresponds to 1000 units of 512

bytes written) and is rounded up. When the LBA size is a value other

than 512 bytes, the controller shall convert the amount of data written

to 512-byte units. For the NVM command set, logical blocks written as

part of write operations shall be included in this value. Write uncor-

rectable commands shall not impact this value.

79:64 Host read commands Contains the number of read commands issued to the controller.

95:80 Host write commands Contains the number of write commands issued to the controller.

111:96 Controller busy time Contains the amount of time the controller is busy with I/O commands.

The controller is busy when there is a command outstanding to an I/O

queue (specifically, a command was issued via an I/O submission queue

tail doorbell write and the corresponding completion queue entry has

not been posted yet to the associated I/O completion queue.) This val-

ue is reported in minutes.

127:112 Power cycles Contains the number of power cycles.

143:128 Power on hours Contains the number of power-on hours. This does not include time

that the controller was powered and in a low-power state condition.

159:144 Unsafe shutdowns Contains the number of unsafe shutdowns. This count is incremented

when a shutdown notification (CC.SHN) is not received prior to loss of

power.

175:160 Media errors Contains the number of occurrences where the controller detected an

unrecovered data integrity error. Errors such as uncorrectable ECC, CRC

checksum failure, or LBA tag mismatch are included in this field.

191:176 Number of error info log entries Contains the number of error information log entries over the life of

the controller.

511:192 Reserved Reserved

7100 U.2 NVMe PCIe SSD

Supported Commands

CCMTD-731836775-10498

7100_u2_nvme_pcie_ssd.pdf - Rev. G 03/17 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Out of Band Management

The 7100 allows sideband management using the SMBus and two protocols:

Table 11: Basic Management Command (Address 0x6A)

Command

Code Bytes Description

0 00 Length of Status: Indicates number of additional bytes to read before encountering PEC.

Always 6 (06h) in this version of the spec.

01 Status Flags (SFLGS): This field indicates the status of the NVM subsystem.

SMBus Arbitration – Bit 7 is set ‘1’ after a SMBus block read is completed all the way to the

stop bit without bus contention and cleared to ‘0’ if a SMBus Send Byte FFh is received on

this SMBus slave address.

Drive Not Ready – Bit 6 is set to ‘1’ when the subsystem cannot process NVMe manage-

ment commands, and the rest of the transmission may be invalid. If cleared to ‘0’, then the

NVM subsystem is fully powered and ready to respond to management commands. This

logic level intentionally identifies and prioritizes powered up and ready drives over their

powered off neighbors on the same SMBus segment.

Drive Functional – Bit 5 is set to ‘1’ to indicate an NVM subsystem is functional. If cleared

to ‘0’, then there is an unrecoverable failure in the NVM subsystem and the rest of the

transmission may be invalid.

Reset Not Required - Bit 4 is set to ‘1’ to indicate the NVM subsystem does not need a reset

to resume normal operation. If cleared to ‘0’ then the NVM subsystem has experienced an

error that prevents continued normal operation. A controller reset is required to resume

normal operation.

Port 0 PCIe Link Active - Bit 3 is set to ‘1’ to indicate the first port’s PCIe link is up (i.e., the

Data Link Control and Management State Machine is in the DL_Active state). If cleared to

‘0’, then the PCIe link is down.

Port 1 PCIe Link Active - Bit 2 is set to ‘1’ to indicate the second port’s PCIe link is up. If

cleared to ‘0’, then the second port’s PCIe link is down or not present.

Bits 1-0 shall be set to ‘1’.

02 SMART Warnings: This field shall contain the Critical Warning field (byte 0) of the NVMe

SMART / Health Information log. Each bit in this field shall be inverted from the NVMe def-

inition (i.e., the management interface shall indicate a ‘0’ value while the corresponding

bit is ‘1’ in the log page). Refer to the NVMe specification for bit definitions.

If there are multiple controllers in the NVM subsystem, the management endpoint shall

combine the Critical Warning field from every controller such that a bit in this field is:

Cleared to ‘0’ if any controller in the subsystem indicates a critical warning for that corre-

sponding bit.

Set to ‘1’ if all controllers in the NVM subsystem do not indicate a critical warning for the

corresponding bit.

7100 U.2 NVMe PCIe SSD

Supported Commands

CCMTD-731836775-10498

7100_u2_nvme_pcie_ssd.pdf - Rev. G 03/17 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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