22
SAM9N12/SAM9CN11/SAM9CN12 [SUMMARY DATASHEET]
11063HS–ATARM–27-Sep-13
B10
VDDIOM EBI_CLK SDCK O O
B11
VDDIOM EBI_CLK #SDCK O O
C12
VDDIOM EBI_O SDCKE O O, PU
G11
VDDIOM EBI_O RAS O O, PU
E12
VDDIOM EBI_O CAS O O, PU
H12
VDDIOM EBI_O SDWE O O, PU
H10
VDDIOM EBI_O SDA10 O O, PU
A12
VDDIOM EBI_O DQM0 O O, PU
C11
VDDIOM EBI_O DQM1 O O, PU
H11
VDDIOM EBI DQS0 I/O I, PD
E11
VDDIOM EBI DQS1 I/O I, PD
B3
VDDANA POWER ADVREF I I
T18
VDDUSB USBFS HDP I/O O, PD
U18
VDDUSB USBFS HDM I/O O, PD
P18
VDDUSB USBFS DDP I/O O, PD
R18
VDDUSB USBFS DDM I/O O, PD
C6
VDDBU SYSC WKUP I I, ST
G8
VDDBU SYSC SHDN O O, PU
U14
VDDCORE RSTJTAG BMS I I, PU, ST
C4
VDDBU SYSC JTAGSEL I I, PD, ST
C5
VDDBU SYSC TST I I, PD, ST
V8
VDDIOP0 RSTJTAG TCK I I, ST
U8
VDDIOP0 RSTJTAG TDI I I, ST
P12
VDDIOP0 RSTJTAG TDO O O, ST
R11
VDDIOP0 RSTJTAG TMS I I, ST
V12
VDDIOP0 RSTJTAG RTCK O O, ST
U11
VDDIOP0 RSTJTAG NRST I/O O, PU, ST
U9
VDDIOP0 RSTJTAG NTRST I I, PU, ST
B4
VDDBU CLOCK XIN32 I I
B5
VDDBU CLOCK XOUT32 O O
V16
VDDIOP0 CLOCK XIN I I
V15
VDDIOP0 CLOCK XOUT O O
H8
NC
U12
NC
R13
NC
Table 4-2. BGA247 Pin Description (Continued)
Ball Power Rail I/O Type
Primary Alternate PIO Peripheral A PIO Peripheral B PIO Peripheral C Reset State
Signal Dir Signal Dir Signal Dir Signal Dir Signal Dir
Signal, Dir,
PU, PD, ST
