LTC4359
3
Rev D
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Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into pins are positive; all voltages are referenced to
V
SS
unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Operating Supply Range
l
4 80 V
I
IN
IN Current IN = 12V
IN = OUT = 12V, SHDN = 0V
IN = OUT = 24V, SHDN = 0V
IN = −40V
l
l
l
l
0
150
9
15
–15
200
20
30
–40
µA
µA
µA
µA
I
OUT
OUT Current IN = 12V, In Regulation
IN = 12V, ∆V
SD
= −1V
IN = OUT = 12V, SHDN = 0V
IN = OUT = 24V, SHDN = 0V
OUT = 12V, IN = SHDN = 0V
l
l
l
l
l
3
5
120
0.8
0.8
6
7.5
220
3
3
12
µA
µA
µA
µA
µA
I
SOURCE
SOURCE Current IN = 12V, ∆V
SD
= −1V
IN = SOURCE = 12V, SHDN = 0V
SOURCE = –40V
l
l
l
1
–0.4
150
4
–0.8
200
15
–1.5
µA
µA
mA
∆
V
GATE
Gate Drive (GATE–SOURCE) IN = 4V, I
GATE
= 0, −1µA
IN = 8V to 80V; I
GATE
= 0, –1µA
l
l
4.5
10
5.5
12
15
15
V
V
∆
V
SD
Source-Drain Regulation Voltage (IN –OUT) ∆V
GATE
= 2.5V
l
20 30 45 mV
I
GATE(UP)
Gate Pull-Up Current GATE = IN, ∆V
SD
= 0.1V
l
–6 –10 –14 µA
I
GATE(DOWN)
Gate Pull-Down Current Fault Condition, ∆V
GATE
= 5V, ∆V
SD
= −1V
Shutdown Mode, ∆V
GATE
= 5V, ∆V
SD
= 0.7V
l
l
70
0.6
130 180 mA
mA
t
OFF
Gate Turn-Off Delay Time ∆V
SD
= 0.1V to −1V, ∆V
GATE
< 2V,
C
GATE
= 0pF
l
0.3 0.5 µs
t
ON
Gate Turn-On Delay Time IN = 12V, SOURCE = OUT = 0V, SHDN = 0V to 2V
∆V
GATE
> 4.5V, C
GATE
= 0pF
200 µs
V
SHDN(TH)
SHDN Pin Input Threshold IN = 4V to 80V
l
0.6 1.2 2 V
V
SHDN(FLT)
SHDN Pin Float Voltage IN = 4V to 80V
l
0.6 1.75 2.5 V
I
SHDN
SHDN Pin Current SHDN = 0.5V, LTC4359I, LTC4359C
SHDN = 0.5V, LTC4359H
SHDN = −40V
Maximum Allowable Leakage, V
IN
= 4V
l
l
l
–1
–0.5
–0.4
–
3
–3
–0.8
100
–
5
–5
–1.5
µA
µA
mA
nA
V
SOURCE(TH)
Reverse SOURCE Threshold for GATE Off GATE = 0V, I
GATE(DOWN)
= 1mA
l
–0.9 –1.8 –2.7 V
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, IN = 12V, SOURCE = IN, unless otherwise noted.
Note 3. An internal clamp limits the OUT pin to a minimum of 100V above
V
SS
. Driving this pin with more current than 1mA may damage the device.
Note 4. An internal clamp limits the GATE pin to a minimum of 10V above
IN or 100V above V
SS
. Driving this pin to voltages beyond the clamp may
damage the device.
ELECTRICAL CHARACTERISTICS
