AD6659BCPZ-80

Mfr. #:: AD6659BCPZ-80
Manufacturer:: Rochester Electronics, LLC
Description:: RF Receiver IC Dual IF Diversity Receive
Lifecycle:: New from this manufacturer.
Datasheet:: AD6659BCPZ-80 Datasheet
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Manufacturer: ADI

Product Category: IC Chips

Tags: AD665, AD66, AD6

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AD6659BCPZ-80 Description

***et: ADC Dual Pipelined 80Msps 12-bit Parallel 64-Pin LFCSP EP Tray

***ponent Stockers USA: TELECOM CELLULAR RF AND BASEBAND CIRCUIT QCC64

***i-Key: IC IF TO BASEBAND RCVR 64LFCSP

***log Devices: The AD6659 is a mixed-signal, dual-channel IF receiver supporting radio topologies requiring two receiver signal paths, such as in main/diversity or direct conversion. This communications systems processor consists of two high performance analog-to-digital converters (ADCs) and noise shaping requantizer (NSR) digital blocks. It is designed to support various commu-nications applications where high dynamic range performance and small size are desired. The high dynamic range ADC core features a multistage differential pipelined architecture with integrated output error correction logic. Each ADC features a wide bandwidth switch capacitor sampling network within the first stage of the differential pipeline. An integrated voltage reference eases design considerations. Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows for improved SNR performance in a smaller frequency band within the Nyquist region. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6659 supports enhanced SNR performance within a limited region of the Nyquist bandwidth while maintaining a 12-bit output resolution. The NSR block is programmed to provide a bandwidth of 20% of the sample clock. For example, with a sample clock rate of 80 MSPS, the AD6659 can achieve up to 81.5 dBFS SNR for a 16 MHz bandwidth at 9.7 MHz AIN. With the NSR block disabled, the ADC data is provided directly to the output with an output resolution of 12 bits. The AD6659 can achieve up to 72 dBFS SNR for the entire Nyquist bandwidth when operated in this mode. After digital processing, output data is routed into two 12-bit output ports that support 1.8 V or 3.3 V CMOS levels. The AD6659 receiver digitizes a wide spectrum of IF frequencies. Each receiver is designed for simultaneous reception of the main and diversity channel. This IF sampling architecture greatly reduces component cost and complexity compared with traditional analog techniques or less integrated digital methods. The AD6659 also incorporates an optional integrated dc offset correction and quadrature error correction (QEC) block that corrects for gain and phase mismatch between the two channels. This functional block proves invaluable in complex signal processing applications such as direct conversion receivers. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance. The digital output data is presented in offset binary, gray code, or twos complement format. A data clock output (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported, and output data can be multiplexed onto a single output bus. The AD6659 is available in a 64-lead, RoHS-compliant LFCSP, and it is specified over the industrial temperature range (-40°C to +85°C). Applications Communications Diversity radio systems Multimode digital receivers 3G, W-CDMA, LTE, CDMA2000, TD-SCDMA, MC-GSM I/Q demodulation systems Smart antenna systems Battery-powered instruments General-purpose software radios

***as Instruments: Dual-Channel, 12-Bit, 80-MSPS Analog-to-Digital Converter (ADC) 64-VQFN -40 to 85

***ical: 2-Channel Dual ADC Pipelined 80Msps 12-bit Parallel/Serial/LVDS 64-Pin VQFN EP T/R

*** Stop Electro: ADC, Proprietary Method, 12-Bit, 1 Func, 2 Channel, Parallel, Word Access, CMOS, PQCC64

***log Devices: 12-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

***p One Stop: Dual Channel Dual ADC Pipelined 80Msps 12-bit Parallel/Serial 64-Pin LFCSP EP Tray

***log Devices: 12 Bit, 80 MSPS Dual Low Power

***ark: Adc, 12Bit, 80Msps, Lfcsp-64; Resolution (Bits):12Bit; Sampling Rate:80Msps; Input Channel Type:differential, Single Ended; Data Interface:serial, Spi; Supply Voltage Type:single; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V Rohs Compliant: Yes

***log Devices: 10-Bit, 65/80/105 MSPS Dual A/D Converter

*** Electronic Components: Analog to Digital Converters - ADC Dual 10-Bit 80 MSPS

***ical: 2-Channel Dual ADC Pipelined 80Msps 10-bit Parallel 64-Pin LFCSP EP Tray

***nell: IC, 10BIT ADC, SMD, 9216, LFCSP-64; Resolution (Bits):10bit; No. of Pins:64; Input Channel Type:Differential; Data Interface:Parallel; Operating Temperature Range:-40°C to +85°C; SVHC:No SVHC (18-Jun-2012); A/D / D/A Features:Parallel Interfface, CMOS; Base Number:9216; Conversion Time:0.0125µs; Data Rate:80Mbps; IC Case Style:LFCSP; IC Generic Number:9216; Linearity Error ADC / DAC +:1LSB; Linearity Error ADC / DAC -:1LSB; Logic Function Number:9216; No. of Bits:10; No. of Channels:2; Operating Temperature Max:85°C; Operating Temperature Min:-40°C; Package / Case:LFCSP; Supply Voltage Max:3.3V; Supply Voltage Min:2.7V; Termination Type:SMD; Voltage Vcc:3V

***log Devices: 14-Bit, 125 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

***et: ADC Dual Pipelined 80Msps 14-bit Parallel/Serial (SPI)/LVDS 64-Pin LFCSP EP

***ark: ADC, DUAL, 14BIT, 80MSPS, SPI, LFCSP-64; Resolution (Bits):14bit; Sampling Rate:80MSPS; Input Channel Type:Differential, Single Ended; Data Interface:SPI; Supply Voltage Type:Single; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V RoHS Compliant: Yes

***as Instruments: Dual-Channel, 12-Bit, 65-MSPS Analog-to-Digital Converter (ADC) 64-VQFN -40 to 85

***ical: 2-Channel Dual ADC Pipelined 65Msps 12-bit Parallel/Serial/LVDS 64-Pin VQFN EP T/R

*** Stop Electro: ADC, Proprietary Method, 12-Bit, 1 Func, 2 Channel, Parallel, Word Access, CMOS, PQCC64

***as Instruments: Dual-Channel, 10-Bit, 65-MSPS Analog-to-Digital Converter (ADC) 64-TQFP -40 to 85

*** Stop Electro: ADC Subsystem, 10-Bit, 1 Func, 2 Channel, Parallel, Word Access, CMOS, PQFP64

***et: ADC Dual Pipelined 65Msps 10-bit Parallel 64-Pin TQFP Tray

***sible Micro: IC, Dual ADC, 10bit, 65MSPS, Diff Inputs, 3.3V, 64-TQFP, SMD

***ark: 10BIT ADC, 65MSPS 3.3V, SMD, TQFP64; Pins, No. of:64; Case style:TQFP / 64; Base number:10; Packaging type:Peel Pack RoHS Compliant: Yes

Market price

Part #	Mfg.	Description	Stock	Price
AD6659BCPZ-80 DISTI # 584-AD6659BCPZ-80	Analog Devices Inc	RF Receiver IC Dual IF Diversity Receiver RoHS: Compliant	0
AD6659BCPZ-80	Analog Devices Inc	RF and Baseband Circuit RoHS: Compliant	2380	1000:$51.6200 500:$54.3300 100:$56.5700 25:$58.9900 1:$63.5300

AD6659BCPZ-80

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