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CA3338MZ96

P1-P3P4-P6P7-P9P10-P10
1
®
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1997. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CMOS Video Speed, 8-Bit, 50 MSPS, R2R
D/A Converters
The CA3338 family are CMOS/SOS high speed R2R voltage
output digital-to-analog converters. They can operate from a
single +5V supply, at video speeds, and can produce
“rail-to-rail” output swings. Internal level shifters and a pin for
an optional second supply provide for an output range below
digital ground. The data complement control allows the
inversion of input data while the latch enable control provides
either feedthrough or latched operation. Both ends of the
R2R ladder network are available externally and may be
modulated for gain or offset adjustments. In addition, “glitch”
energy has been kept very low by segmenting and
thermometer encoding of the upper 3 bits.
The CA3338 is manufactured on a sapphire substrate to give
low dynamic power dissipation, low output capacitance, and
inherent latch-up resistance.
Ordering Information
Features
• CMOS/SOS Low Power
• R2R Output, Segmented for Low “Glitch”
• CMOS/TTL Compatible Inputs
• Fast Settling: (Typ) to
1
/
2
LSB . . . . . . . . . . . . . . . . . . 20ns
• Feedthrough Latch for Clocked or Unclocked Use
• Accuracy (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
• Data Complement Control
• High Update Rate (Typ) . . . . . . . . . . . . . . . . . . . . . 50MHz
• Unipolar or Bipolar Operation
• Pb-free Available
Applications
• TV/Video Display
• High Speed Oscilloscope Display
• Digital Waveform Generator
• Direct Digital Synthesis
Pinout
CA3338, CA3338A
(PDIP, SOIC)
TOP VIEW
PART
NUMBER
LINEARITY
(INL, DNL)
TEMP.
RANGE (°C) PACKAGE
PKG.
DWG. #
CA3338E ±1.0 LSB -40 to 85 16 Ld PDIP E16.3
CA3338EZ
(Note)
±1.0 LSB -40 to 85 16 Ld PDIP
(Pb-free)
E16.3
CA3338AE ±0.75 LSB -40 to 85 16 Ld PDIP E16.3
CA3338AEZ
(Note)
±0.75 LSB -40 to 85 16 Ld PDIP
(Pb-free)
E16.3
CA3338M ±1.0 LSB -40 to 85 16 Ld SOIC M16.3
CA3338MZ
(Note)
±1.0 LSB -40 to 85 16 Ld SOIC
(Pb-free)
M16.3
CA3338AM ±0.75 LSB -40 to 85 16 Ld SOIC M16.3
CA3338AMZ
(Note)
±0.75 LSB -40 to 85 16 Ld SOIC
(Pb-free)
M16.3
Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which is compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J Std-020B.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D7
D6
D5
D4
D3
D2
V
SS
D1
V
DD
COMP
V
REF
+
V
OUT
V
REF
-
V
EE
D0
LE
FN1850.4
CA3338, CA3338A
Data Sheet July 2004
2
Functional Diagram
COMP
TO 7-LINE
V
DD
D7
D6
D5
D4
D3
D2
D1
D0
V
SS
16
15
14
1
2
3
4
5
6
7
9
8
THERMOMETER
ENCODER
3-BIT
LEVEL
SHIFTERS
FEEDTHROUGH
LATCHES
8R
4R
2R
2R
2R
2R
2R
2R
8R
8R
8R
4R
13
10
V
EE
V
REF
-
V
OUT
V
REF
+
12
11
2R
R
R
R
LE
R ≅ 160Ω
R
R
R
R
CA3338, CA3338ACA3338, CA3338A
3
CA3338, CA3338A
Absolute Maximum Ratings Thermal Information
DC Supply-Voltage Range. . . . . . . . . . . . . . . . . . . . . . .-0.5V to +8V
(V
DD
- V
SS
or V
DD
- V
EE
, Whichever is Greater)
Input Voltage Range
Digital Inputs (LE, COMP D0 - D7). . . . V
SS
- 0.5V to V
DD
+ 0.5V
Analog Pins (V
REF
+, V
REF
-, V
OUT
) . . . .V
DD
- 8V to V
DD
+ 0.5V
DC Input Current
Digital Inputs (LE, COMP, D0 - D7) . . . . . . . . . . . . . . . . . . ±20mA
Recommended Supply Voltage Range . . . . . . . . . . . . . 4.5V to 7.5V
Operating Conditions
Temperature Range (T
A
)
Plastic Package, E suffix, M suffix . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1) θ
JA
(
o
C/W) θ
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A
Maximum Junction Temperature
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range, T
STG
. . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications T
A
= 25
o
C, V
DD
= 5V, V
REF
+ = 4.608V, V
SS
= V
EE
= V
REF
- = GND, LE Clocked at 20MHz, R
L
≥ 1 MΩ,
Unless Otherwise Specified
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
ACCURACY
Resolution 8 - - Bits
Integral Linearity Error See Figure 4
CA3338 - - ±1LSB
CA3338A - - ±0.75 LSB
Differential Linearity Error See Figure 4
CA3338 - - ±0.75 LSB
CA3338A - - ±0.5 LSB
Gain Error Input Code = FF
HEX
, See Figure 3
CA3338 - - ±0.75 LSB
CA3338A - - ±0.5 LSB
Offset Error Input Code = 00
HEX
; See Figure 3 - - ±0.25 LSB
DIGITAL INPUT TIMING
Update Rate To Maintain
1
/
2
LSB Settling DC 50 - MHz
Update Rate V
REF
- = V
EE
= -2.5V, V
REF
+ = +2.5V DC 20 - MHz
Set Up Time t
SU1
For Low Glitch - -2 - ns
Set Up Time t
SU2
For Data Store - 8 - ns
Hold Time t
H
For Data Store - 5 - ns
Latch Pulse Width t
W
For Data Store - 5 - ns
Latch Pulse Width t
W
V
REF
- = V
EE
= -2.5V, V
REF
+ = +2.5V - 25 - ns
OUTPUT PARAMETERS R
L
Adjusted for 1V
P-P
Output
Output Delay t
D1
From LE Edge - 25 - ns
Output Delay t
D2
From Data Changing - 22 - ns
Rise Time t
r
10% to 90% of Output - 4 - ns
Settling Time t
S
10% to Settling to
1
/
2
LSB - 20 - ns
Output Impedance V
REF
+ = 6V, V
DD
= 6V 120 160 200 Ω
Glitch Area - 150 - pV/s
Glitch Area V
REF
- = V
EE
= -2.5V,V
REF
+ = +2.5V - 250 - pV/s
P1-P3P4-P6P7-P9P10-P10

CA3338MZ96

Mfr. #:
Buy CA3338MZ96
Manufacturer:
Renesas / Intersil
Description:
Digital to Analog Converters - DAC W/ANNEAL 16(W INDTEM D/A 8BIT 50MHZ 1 0
Lifecycle:
New from this manufacturer.
Delivery:
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