7
FN7003.7
December 9, 2015
Applications Information
Product Description
The EL7535 is a synchronous, integrated FET 350mA
step-down regulator which operates from an input of 2.5V to
6V. The output voltage is user-adjustable with a pair of
external resistors.
The internally-compensated controller makes it possible to
use only two ceramic capacitors and one inductor to form a
complete, very small footprint 350mA DC/DC converter.
PWM Operation
In the PWM mode, the P-Channel MOSFET and N-Channel
MOSFET always operate complementary. When the
PMOSFET is on and the NMOSFET off, the inductor current
increases linearly. The input energy is transferred to the
output and also stored in the inductor. When the P-Channel
MOSFET is off and the N-Channel MOSFET on, the inductor
current decreases linearly and energy is transferred from the
inductor to the output. Hence, the average current through
the inductor is the output current. Since the inductor and the
output capacitor act as a low pass filter, the duty cycle ratio
is approximately equal to V
O
divided by V
IN
.
The output LC filter has a second order effect. To maintain
the stability of the converter, the overall controller must be
compensated. This is done with the fixed internally
compensated error amplifier and the PWM compensator.
Because the compensations are fixed, the values of input
and output capacitors are 10µF to 22µF ceramic. The
inductor is nominally 1.8µH, though 1.5µA to 2.2µH can be
used.
Start-Up and Shut-Down
When the EN pin is tied to V
IN
, and V
IN
reaches
approximately 2.4V, the regulator begins to switch. The
output voltage is gradually increased to ensure proper
soft-start operation.
When the EN pin is connected to a logic low, the EL7535 is
in the shut-down mode. All the control circuitry and both
MOSFETs are off, and V
OUT
falls to zero. In this mode, the
total input current is less than 1µA.
When the EN reaches logic HI, the regulator repeats the
start-up procedure, including the soft-start function.
RSI/POR Function
When powering up, the open-collector Power-On-Reset
output holds low for about 100ms after V
O
reaches the
preset voltage. When the active-HI reset signal RSI is
issued, POR goes to low immediately and holds for the
same period of time after RSI comes back to LOW. The
output voltage is unaffected. (Please refer to “Timing
Diagram” on page 3). When the function is not used, connect
RSI to ground and leave open the pull-up resistor R
4
at POR
pin.
The POR output also serves as a 100ms delayed Power
Good signal when the pull-up resistor R
4
is installed. The
RSI pin needs to be directly (or indirectly through a resistor
R
6
) connected to Ground for this to function properly.
Output Voltage Selection
Users can set the output voltage of the converter with a
resistor divider, which can be chosen based on Equation 1:
Component Selection
Because of the fixed internal compensation, the component
choice is relatively narrow. For a regulator with fixed output
voltage, only two capacitors and one inductor are required.
We recommend 10µF to 22µF multi-layer ceramic capacitors
with X5R or X7R rating for both the input and output
capacitors, and 1.5µH to 2.2µH inductance for the inductor.
The RMS current present at the input capacitor is decided by
Equation 2:
This is about half of the output current I
O
for all the V
O
. This
input capacitor must be able to handle this current.
The inductor peak-to-peak ripple current is given as
Equation 3:
• L is the inductance
•f
S
is the switching frequency (nominally 1.4MHz)
The inductor must be able to handle I
O
for the RMS load
current, and to assure that the inductor is reliable, it must
handle the 1.5A surge current that can occur during a
current limit condition.
In addition to decoupling capacitors and inductor value, it is
important to properly size the phase-lead capacitor C
4
(Refer to the Typical Application Diagram). The phase-lead
capacitor creates additional phase margin in the control loop
by generating a zero and a pole in the transfer function. As a
general rule of thumb, C
4
should be sized to start the phase-
lead at a frequency of ~2.5kHz. The zero will always appear
at lower frequency than the pole and follow Equation 4:
Over a normal range of R
2
(~10k to100k), C
4
will range
from ~470pF to 4700pF. The pole frequency cannot be set
once the zero frequency is chosen as it is dictated by the
ratio of R
1
and R
2
, which is solely determined by the desired
V
O
0.8 1
R
1
R
2
-------
+
=
(EQ. 1)
I
INRMS
V
IN
V
IN
- V
O
V
IN
-------------------------------------------------
I
O
=
(EQ. 2)
I
IL
V
IN
- V
O
V
O
LV
IN
f
S
--------------------------------------------
=
(EQ. 3)
f
Z
1
2R
2
C
4
----------------------
=
(EQ. 4)
EL7535
